Level realignment following an epitaxy step

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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Details

C117S084000, C117S089000, C117S090000, C117S094000, C117S095000, C117S097000, C117S101000, C117S105000, C257S758000, C257S765000

Reexamination Certificate

active

07830027

ABSTRACT:
The invention relates to inter-level realignment after a stage of epitaxy on a face (31) of a substrate (30), comprising the production of at least one initial guide mark (32) on the face of the substrate, this initial guide mark being designed so as to be transferred, during epitaxy, onto the surface of the epitaxied layer (36). The initial guide mark (32) is produced in such a way that, during epitaxy, its edges create growth defects that propagate as far as the surface of the epitaxied layer (36) to provide a transferred guide mark (37) on the surface of the epitaxied layer (36) reproducing the shape of the initial guide mark (32) and in alignment with the initial guide mark.

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Ian Black “ASM Stepper Alignment Through Thick Expitaxial Silicon Films”, SPIE, vol. 3741, May 1999, pp. 23-33, XP-002319008.

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