Level determining circuit generating output signal at first or s

Details Level determining circuit generating output signal at first or s Level determining circuit generating output signal at first or s

1989-09-07

1991-01-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307359, 307494, H03K 5153, G06G 712

Patent

active

049838580

ABSTRACT:
A level determining circuit compares an input signal and a reference signal in level, generates a first output signal at a first output terminal (11) when the former is greater than the latter, and generates a second output signal at a second output terminal (12) if the former is smaller than the latter. A switch (15) is disposed in the preceding stage of the first output terminal, which will be opened if the first output signal is not required. A buffer amplifier portion (14) of high input impedance is further provided in the preceding stage of this switch so that the level determining operation can not be influenced by the change in impedance caused by switching of the switch.

REFERENCES:
patent: 4459493 (1984-07-01), Moore
patent: 4527076 (1985-07-01), Matsuo et al.
patent: 4791317 (1988-12-01), Winnerl et al.
patent: 4859871 (1989-08-01), Kobayashi et al.
patent: 4939750 (1990-07-01), Nakamura

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