Level converter circuit having two multi-collector transistors f

Details Level converter circuit having two multi-collector transistors f Level converter circuit having two multi-collector transistors f

1991-11-26

1993-11-16

Wambach, Margaret R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307290, 307359, 3072993, H03K 329, H03K 190175

Patent

active

052626822

ABSTRACT:
A level converter circuit having hysteresis characteristics between an input voltage and an output voltage comprises two multi-collector transistors constituting a differential amplifier, a reference voltage control unit for controlling a reference voltage supplied to the differential amplifier, and an output level switching unit for switching and outputting the output voltage between a first voltage level and a second voltage level. The reference voltage control unit is connected to first collectors of the two multi-collector transistors, and the output level switching unit is connected to second collectors of the two multi-collector transistors. Therefore, an occupied area of the level converter circuit can be small and a circuit configuration can be simplified, and thus the level converter circuit can be applied to a masterslice type LSI. Further, a chip area including the level converter circuit can be small and cost thereof can be reduced.

REFERENCES:
patent: 4259601 (1981-03-01), Stein
patent: 4717839 (1988-01-01), Miller
patent: 5132559 (1992-07-01), Baskett
"Input Stage Transconductance Reduction Technique for High-Slew Rate Operational Amplifiers", Schmook, IEEE Journal of Solid-State Circuits vol. SC-10, No. 6, Dec. 1975.

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