Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1991-12-26
1993-08-31
Westin, Edward P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307451, 307594, H03K 19094, H03K 1716, H03K 1728
Patent
active
052412253
ABSTRACT:
A level conversion circuit includes a first pMOS transistor having a source connected to a first power supply line, a gate receiving a first input signal, and a drain, and a second pMOS transistor having a source connected to the first power supply line, a gate receiving a second input signal, and a drain. A first nMOS transistor has a drain connected to a first output terminal and the drain of the first pMOS transistor, a gate, and a source. A first output signal is output via the first output terminal. A second nMOS transistor has a drain connected to a second output terminal, the drain of the second pMOS transistor and the gate of the first nMOS transistor, a gate connected to the drain of the first nMOS transistor, and a source. A second output signal is output via the second output terminal. A control part prevents a current from passing through the first pMOS transistor and the first nMOS transistor when both the first pMOS transistor and the first nMOS transistor are ON, and prevents a current from passing through the second pMOS transistor and the second nMOS transistor when both the second pMOS transistor and the second nMOS transistor are ON.
REFERENCES:
patent: 4518873 (1985-05-01), Suzuki et al.
patent: 4760279 (1988-07-01), Saito et al.
patent: 4845381 (1989-04-01), Cuevas
patent: 4978870 (1990-12-01), Chen et al.
patent: 5023480 (1991-06-01), Gieseke et al.
patent: 5075581 (1991-12-01), Kamata
IEEE ICCD'89 Conference Proceedings, Oct. 1989, Cambridge, U.S., pp. 314-317; G. Boudon et al., "Internal ECL-BICMOS translator circuits in half micron technology".
Kurosaki Kazuhide
Okajima Yoshinori
Driscoll Benjamin D.
Fujitsu Limited
Westin Edward P.
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