Level conversion circuit controlled by clock signal

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

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Details

327211, 327208, 326 81, 326 68, H03K 190175

Patent

active

058923853

ABSTRACT:
In a level conversion circuit where the input signal is input via a flip-flop which sets its output in a high impedance state during the holding state, by adding a circuit which sets the output voltage to a predetermined potential level when the output of the flip-flop is in a high impedance state, the leakage current is reduced and a clock skew is prevented, to result in a stable operation of the level conversion circuit.

REFERENCES:
patent: 5444396 (1995-08-01), Sneda
patent: 5530392 (1996-06-01), Runas et al.

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