Level conversion circuit

Details Level conversion circuit Level conversion circuit

1980-06-09

1982-10-26

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307456, 307475, H03K 501, H03K 502

Patent

active

043564097

ABSTRACT:
A level conversion circuit for converting a signal of a polarity to a signal of the opposite polarity has differential pair transistors, push-pull type output transistors adapted to receive the differential outputs of opposite phases from the differential pair transistors, a plurality of protective transistors for protecting the output transistors and a capacitance separation element connected between the common collector outputs of the plurality of protective transistors and the output of one of the differential pair transistors. The protective transistor prevents both of the differential outputs from simultaneously taking high level due to various operating conditions of the conversion circuit. Therefore, the deterioration or breakdown of the output transistors caused by the through current is avoided. The capacitance separation element also contributes to prevent the reduction of operation speed of the differential transistors caused by the collector capacitances of the plurality of protective transistors.

REFERENCES:
patent: 3974402 (1976-08-01), Fett et al.
J. C. Froment et al., "ECL to TTL Translator Driver", IBM Technical Disclosure Bulletin, vol. 21, No. 10, Mar. 1979, pp. 4074-4075.
Patent Abstracts of Japan, vol. 2, No. 104, 26.08.78, p. 5430 E 78.

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