Level conversion circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307264, 307451, H03K 19092, H03K 19094

Patent

active

047822511

ABSTRACT:
Level conversion circuit for converting CMOS logic level signals to ECL logic level signals. The level conversion circuit includes: a level shift circuit which receives as input a CMOS logic level signal and a CMOS logic level signal of opposite logic level to the first-mentioned CMOS logic level signal, and which supplies a base potential that effects operation of a bipolar transistor in the unsaturated region and a base potential at which the bipolar transistor becomes non-conducting; a differential amplifier circuit inserted between a high-potential voltage source and a low-potential voltage source and that selects the path of current flowing from the high-potential voltage source to the low-potential voltage source by controlling bipolar transistors whose emitter terminals are mutually connected and whose conduction is controlled by said base potentials; and a bipolar transistor that is conduction controlled by one of the collector potentials of said bipolar transistors and that outputs an ECL logic level signal from its emitter terminal.

REFERENCES:
patent: 4437171 (1984-03-01), Hudson et al.
patent: 4453095 (1984-06-01), Wrathall
patent: 4645951 (1987-02-01), Uragami
Patent Abstracts of Japan, vol. 8, No. 167 (E-258) [1604], Aug. 2, 1984; & JP-A-59 64916 (Thoshiba K.K.) 13-04-1984, *whole document*.

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