Metal fusion bonding – Process – Plural joints
Reexamination Certificate
2003-02-04
2004-09-07
Stoner, Kiley (Department: 1725)
Metal fusion bonding
Process
Plural joints
C228S191000, C228S225000, C228S227000, C228S254000
Reexamination Certificate
active
06786390
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a LED stack manufacturing method and its structure thereof, more particularly to the vertical stacking method and twice bonding process to convert the epitaxial layer and high-thermal-conductive substrate into a LED with more reliable and efficient optical output.
BACKGROUND OF THE INVENTION
Traditional light emitting diode (LED) uses the chemical compound semiconductor substrate (III-V compound such as gallium arsenide (GaAs), indium phosphate (InP), gallium phosphate (GaP), and aluminum oxide (Al
2
O
3
) as well as the epitaxial wafer growth technology to develop the N-type and P-type semiconductor. The epitaxial wafer goes through the chemical, lithographical, etching, evaporation, and polishing processes to form the compound semiconductor component, which is cut in to dices, and finally attaches the dice on the conductive frame for packaging into products such as lamp bulbs.
Since the compound semiconductor substrate material of the aforementioned product will absorb the photons emitted downwardly from the LED to the substrate, therefore the optical output efficiency will be reduced drastically. Furthermore, the substrate for growth the epitaxial wafer generally has lower thermal conductivity (<80 W/m-K), and thus the packaged component cannot be operated under a higher current and also cannot accomplish higher output efficiency. In the meantime, the thermal conductivity of the substrate is lower, which will seriously deteriorate the actual life of the component by the influence of external factors such as weather.
At present, some LED has improvement on the aforementioned shortcomings, but such technology still has its shortcomings and limitations, which is described as follows:
1. In the journal “Applied Physics Letter Vol. 64, No. 21, 2839, (1994)” entitled “Very high-efficiency semiconductor wafer-bonded transparent-substrate (Al
x
Ga
1−x
)
0.5
P/GaP” by Kish, et. al, a LED with transparent substrate (TS) wafer(Al
x
Ga
1−x
)
0.5
In
0.5
P/GaP of a wafer bonding is disclosed. Such (Al
x
Ga
1−x
)
0.5
In
0.5
P/GaP uses the vapor phase epitaxial growth to form a P-type gallium phosphate (GaP) window with a thickness of about 50 i m, and then uses the conventional chemical etching method to selectively remove the N-type gallium arsenide substrate (GaAs), and then bonds the exposed N-type layer to the N-type gallium phosphate (GaP) substrate of about 8-10 mil thick. As to the luminous intensity, the luminous intensity of the TS AlGaInP LED produced by such method is increased by 1~2 times of the AlGaInP LED produced by the absorbing-substrate (AS). However, the shortcomings of such TSAlGaInP LED include its complicated manufacturing process and the manufacturing requirement of high temperature from 800° C. to 1000° C. Therefore, it is difficult to accomplish the high yield or lower the manufacturing cost.
2. Another technology disclosed in Applied Physics Letter Vol. 75, No. 20, 3054, (1999)” entitled “AlGaInP light-emitting diodes with mirror substrates fabricated by wafer bonding” by Horng, et.al uses a wafer fusion technology to form a mirror-substrate (MS) AlGaInP/metal/silicon dioxide/silicon LED, which uses AuBe/Au as the adhesive material to bond the silicon substrate and the LED epitaxial wafer layer. However, in the bonding process of 20 ma current, the luminous strength of such MS AlGaInP LED is only about 90 mcd, which is still 40% less than the luminous strength of the TS AlGaInP LED and therefore its luminous strength is unable to meet the requirements. Furthermore, the P-type electrode and the N-type electrode are formed on the same side, therefore the size cannot be reduced and its size is even larger than the traditional LED wafer with the P-type electrode and N-type electrode located on different sides. Therefore, it cannot satisfy the requirement for trend of having smaller size in packaging.
SUMMARY OF THE INVENTION
The primary objective of the present invention is to overcome the aforementioned shortcomings and avoid the existence of the shortcoming by using a stacking method to integrate the epitaxial layer and the high-thermal-conductive substrate by twice bonding process, and the converted epitaxial layer of the temporary bonded substrate replaces the epitaxial wafer growth substrate, and the second bonded layer of the etch stop layer of the epitaxial layer is bonded with the second bonded layer of the high-thermal-conductive substrate to form an alloy layer with permanent connection, and then the temporary bonded substrate is removed, such that the process completes the integration of the epitaxial layer and the high-thermal-conductive substrate and makes the ohmic contact layer to face upward. The objectives of the present invention are summarized as follows:
1. Each bonded layer according to the present invention adopts the stacking pressurization at a lower temperature range from 150° C. to 400° C. for the formation. As to the manufacturing process, it is simpler and easier to the control the yield rate and lower the manufacturing cost when compared with the abovementioned technologies, and the bonded layer under the liquid fused state at low temperature can repair the unevenness of the developed epitaxial wafer layer of the compound semiconductor substrate, so that the bonding of the finished goods will be tighter.
2. Since the epitaxial wafer layer is bonded to the high-thermal-conductive substrate by an alloy layer, and the value of the high-thermal-conductive substrate is larger than 120 W.m-K, which can accomplish an excellent effect of heat dispersion so that the performance of the product is more stable, and can be used in larger current.
3. The ohmic contact layer of the epitaxial wafer layer faces upward after it is produced, and it can avoid the reduction or deterioration of the emitting photons to assure the optical output efficiency of the present invention. The ohmic contact layer and etch stop layer of the epitaxial wafer layer are located on different sides of the surface, and it can further satisfy the requirements for a small and compact product after packaging.
To make it easier for our examiner to understand the objective of the invention, its structure, innovative features, and its performance, we use a preferred embodiment together with the attached drawings for the detailed description of the invention.
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Chang Chih-Sung
Chen Tzer-Perng
Wang Pai-Hsiang
Yang Kuang-Neng
Stoner Kiley
United Epitaxy Company Ltd.
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