Leadless semiconductor package and method for manufacturing...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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C257S676000, C257SE23006, C257SE23049, C257SE23052, C257SE23055

Reexamination Certificate

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07575957

ABSTRACT:
A leadless semiconductor package mainly includes a plurality of inner leads, a chip pad, a semiconductor chip and a molding compound. A non-conductive ink is filled between every two of the inner leads, and couples the inner leads to the chip pad so as to be in replacement of the conventional tie bars. The semiconductor chip is disposed on the chip pad and electrically connected to the inner leads. Moreover, the molding compound is formed on the inner leads and the non-conductive ink for encapsulating the semiconductor chip. The non-conductive ink prevents the exposed bottom surfaces of the inner leads from contamination by the molding compound without attaching an external tape during molding. Also the inner leads can be in a multi-row arrangement and the chip pad can be disposed in an optional location.

REFERENCES:
patent: 6452255 (2002-09-01), Bayan et al.
patent: 6483180 (2002-11-01), Bayan et al.
patent: 6577013 (2003-06-01), Glenn et al.
patent: 6629880 (2003-10-01), Kang et al.
patent: 6975022 (2005-12-01), Sakamoto et al.
patent: 7312105 (2007-12-01), Huang et al.
The American Heritage College Dictionary, Houghton Mifflin Company, Fourth Edition, p. 714.
Van Zant, “Microchip Fabrication—A Practical Guide To Semiconductor Processing”; 2004; McGraw-Hill Companies; p. 590.

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