Leadless semiconductor package and manufacturing method thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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Details

C438S124000, C438S126000, C257S666000

Reexamination Certificate

active

11416102

ABSTRACT:
A leadless semiconductor package mainly includes a semiconductor device securely attached to an upper surface of a die pad by solder paste and a plurality of leads arranged about the periphery of the die pad. The thickness of the leads and the die pad are within a range of 10 to 20 mils. The semiconductor device is electrically coupled to one of the leads. A package body is formed over the semiconductor device and the leads in a manner that the lower surfaces of the die pad and the leads are exposed through the package body. Preferably, the first semiconductor device is electrically coupled to one of the leads by at least one heavy gauge aluminum wire. The present invention further provides a method of producing the semiconductor package described above.

REFERENCES:
patent: 5559369 (1996-09-01), Newman
patent: 6229200 (2001-05-01), Mclellan et al.
patent: 6400004 (2002-06-01), Fan et al.
patent: 6448643 (2002-09-01), Cheah et al.
patent: 6452255 (2002-09-01), Bayan et al.
patent: 208794 (2003-07-01), None
patent: 186089 (2003-09-01), None
patent: 187490 (2003-10-01), None
patent: 194269 (2004-01-01), None

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