Leadframe with a chip pad for two-sided stacking and method...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Reexamination Certificate

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07101733

ABSTRACT:
A leadframe with a chip pad for two-sided stacking including a chip pad and a plurality of leads is disclosed. A dielectric adhesive layer is formed on the lower surface of the chip pad and is adhered onto a first trace layer, which has a connecting pad. At least a through hole passes through the chip pad, the dielectric adhesive layer and the first trace layer. An electrically-conductive material is formed inside the through hole for electrically connecting the connecting pad of the first trace layer to the chip pad. When an electronic component is mounted on the lower surface of the chip pad, a plurality of bonding wires having one ends on the upper surface of the chip pads can electrically connect the electronic component to the leads for achieving two-sided stacking of the chip pad.

REFERENCES:
patent: 6544812 (2003-04-01), Camenforte et al.
patent: 6872591 (2005-03-01), Wang et al.
patent: 6908788 (2005-06-01), Lin
patent: 6913949 (2005-07-01), Pflughaupt et al.

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