Leadframe semiconductor-mounting substrate having a roughened ad

Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...

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Details

437220, 437211, 29827, 428901, 257676, 257672, 257668, H01L 2156, H01L 2158, H01L 2160

Patent

active

051750600

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

This invention relates to a semiconductor-mounting substrate, and more particularly to a semiconductor-mounting substrate advantageously used for mounting semiconductor parts of multiple terminals in a high density and a method of producing the same.


BACKGROUND ART

There is a problem of obtaining a connection of a semiconductor part having a large pin number to a printed circuit board (substrate).
In general, the connection between the semiconductor part having a large pin number and the printed circuit board (substrate) is carried out by packaging. Particularly, a single chip type package mounting only one semiconductor part is typical.
Heretofore, one of such packages is called a PGA (Pin Grid Array) type. This package is constructed by connecting the semiconductor parts to a conductor circuit formed on the substrate using many conductor pins according to a given arrangement. Furthermore, a package called a TAB (Tape Automated Bonding) type is constructed by connecting a finger lead formed as a part of the conductor circuit on the substrate and connected to electronic circuit parts by thermal pressing and then potting it with a resin for sealing. Also, a packaged called a QFP (Quad Flat Package) type is constructed by connecting a lead frame to a semiconductor part through wire bonding and then subjecting it to transfer molding.
However, each of the conventional packages has defects. That is in the PGA package the pitch distance between the conductor pins is restricted, so that it is difficult to make the packaging density high. Furthermore, in the TAB type packages, it is necessary to use a special mounting machine in the heat pressing of finger leads to a semiconductor part, which is costly. Moreover, in the QFP type packages, it is difficult to form a fine pattern, so that the high density formation is not possible.
The inventors have particularly studied the QFP type package. As a result, when a semiconductor part, having a large number of terminals, is mounted onto the package, the substrate and particularly lead frame, having a fine pattern, should be used. However, the lead frame forming the substrate usually has a thickness of about 150 .mu.m for providing the strength. Therefore, the lead frame having such a thickness is difficult to be subjected to an etching, and particularly it is very difficult to form a lead frame having a fine pattern.
On the contrary, there have hitherto been proposed some techniques for improving the QFP type packages. For example, there is a package of such a type that the semiconductor part and lead frame are connected through a substrate provided with a fine conductor circuit. For instance, there are known electrically connected by wire bonding, and further the conductor circuit on the substrate and the semiconductor are connected by wire bonding and thereafter such an assembly is subjected to transfer molding to form a package; and connected by through-holes, and the conductor circuit and the semiconductor part are connected by wire bonding, and thereafter the assembly is subjected to transfer molding to form a package.
However, the former package in (a) has problems that the connection reliability is lacking because the connection of the lead frame to the circuit of the substrate is carried out by wire bonding. On the other hand, in the latter package (b), the connection of the lead frame to the circuit of the substrate is carried out by the through-holes, and high connection reliability is obtained, but there is a problem that the production process becomes very complicated. Furthermore, all of these improved packages are manufactured by combining the existing substrate with the existing lead frame, so that the cost becomes undesirably high.
An object of the invention is to establish a technique such that a semiconductor-mounting substrate used for mounting a semiconductor part, having many terminals onto a printed circuit board in a high density, can simply be manufactured with a high connection reliability and a low cost.


DISCLOSURE OF THE I

REFERENCES:
patent: 4118595 (1978-10-01), Pfahnl et al.
patent: 4246595 (1981-01-01), Noyori et al.
patent: 4767049 (1988-08-01), Butt et al.
patent: 4876588 (1989-10-01), Miyamoto
patent: 5055321 (1991-10-01), Enomoto et al.
Japanese Utility Model Appln. No. 62-89861 Date of Appln., Jun. 10, 1987.
Japanese Utility Model Laid Open: No. 63-197356, Date of Laid open Dec. 19, 1988.

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