Leadframe package for MEMS microphone assembly

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S666000, C257SE23145, C438S123000

Reexamination Certificate

active

07550828

ABSTRACT:
A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have air access to a sensor die in the package from a front side of the printed circuit board via the acoustic port. The leadframe may also have a hollow or concave recess that defines an acoustic cavity in conjunction with the sensor die or printed circuit board.

REFERENCES:
patent: 4942452 (1990-07-01), Kitano et al.
patent: 5331205 (1994-07-01), Primeaux
patent: 5684332 (1997-11-01), Chen et al.
patent: 6031281 (2000-02-01), Kang et al.
patent: 6083775 (2000-07-01), Huang et al.
patent: 6339254 (2002-01-01), Venkateshwaran et al.
patent: 6472762 (2002-10-01), Kutlu
patent: 6558978 (2003-05-01), McCormick
patent: 6617201 (2003-09-01), Chye et al.
patent: 6742561 (2004-06-01), Nam et al.
patent: 6768190 (2004-07-01), Yang et al.
patent: 6774478 (2004-08-01), Eto et al.
patent: 6838761 (2005-01-01), Karnezos
patent: 6861288 (2005-03-01), Shim et al.
patent: 6940169 (2005-09-01), Jin et al.
patent: 6943057 (2005-09-01), Shim et al.
patent: 6963142 (2005-11-01), Bolken
patent: 6969640 (2005-11-01), Dimaano Jr. et al.
patent: 6995468 (2006-02-01), Abe et al.
patent: 7005325 (2006-02-01), Chow et al.
patent: 7042098 (2006-05-01), Harun et al.
patent: 7064430 (2006-06-01), Chow et al.
patent: 2004/0036164 (2004-02-01), Koike et al.
patent: 2004/0113253 (2004-06-01), Karnezos
patent: 2004/0229399 (2004-11-01), Chen et al.
patent: 2004/0262039 (2004-12-01), Taggart et al.
patent: 2005/0012195 (2005-01-01), Go et al.
patent: 2005/0090050 (2005-04-01), Shim et al.
patent: 2006/0110849 (2006-05-01), Lee et al.
patent: 2007/0013052 (2007-01-01), Zhe et al.
Office action dated Sep. 26, 2008 for U.S. Appl. No. 11/525,493, filed Sep. 22, 2006.
Office action dated Aug. 1, 2008 for U.S. Appl. No. 11/532,387, filed Sep. 15, 2006.
Office action dated Jan. 16, 2009 for U.S. Appl. No. 11/532,387, filed Sep. 15, 2006.
Office action dated Aug. 5, 2008 for U.S. Appl. No. 11/601,103, filed Nov. 17, 2006.
Office action dated Jun. 9, 2008 for U.S. Appl. No. 11/608,164, filed Dec. 7, 2006.
Office action dated Dec. 23, 2008 for U.S. Appl. No. 11/608,164, filed Dec. 7, 2006.
“BCC Bump Chip Carrier,” STATSChipPAC Ltd., 2 pages (May, 2006).
“Data Sheet—Package Stackable Very Thin Fine Pitch BGA (PSvfBGA),” Amkor Technology, 2 pages (Apr. 2006).
“Data Sheet—Stacked CSP (S-CSP),” Amkor Technology, 2 pages (Jul. 2005).
“Redistributed Chip Package (RCP) Technology,” Freescale Semiconductor (2005).
“Solder Bump Flip Chip,” Tutorial 2-Nov., 2002, http://www.flipchips.com/tutorial02a.html.
“Trends in Package Development: FCBGA (Flip Chip Ball Grid Array),” NEC Electronics, http://www.necel.com/pkg/en/pk02—03.html.
“Wire Bond an Beyond: Semiconductor Packaging Innovations,” Freescale Semiconductor, Inc., Doc. No. WireBondBynDwp, Rev. 0 (Jul. 2006).
Aguirre, “Super High Density Packaging Technologies,” Fujitsu Microelectronics America, Inc., 23 pages (Sep. 2002).
Allan, “SiP Really Packs It In,”Electronic Design, 13 pages (Nov. 29, 2004) [http://www.elecdesign.com/Articles/Print.cfm?ArticleID-9175].
Baliga, “Via Lands Double as Bonding Pads,”Semiconductor International, pp. 1-3, 2006 http://www.reed.electronics.com/semiconductor/article/CA6329047.html.
FlipChip International, “Bumping Design Guide,” Revised Aug. 2005, www.flipchip.com.
Pendse et al., “Bond-on-Lead: A Novel Flip Chip Interconnection Technology for Fine Effective Pitch and High I/O Density,”Electronic Components and Technology Conference, May 30-Jun. 2, 2006.
Pendse, “Future Directions in Package-level Integration,”APIA Symposium, Jul. 15, 2004, 18 pages.
Riley, “Introduction to Flip Chip: What, Why, How,” posted Oct. 2000, Tutorial 1- Oct. 2000, http://www.flipchips.com/tutorial01.html.
Sturcken et al., “Advanced Packaging, Cover Story: Bare Chip Stacking,”Advanced Packaging Magazine, 5 pages, Apr. 2003 <http://ap.pennnet.com/Articles/Article—Display.cfm?Section=Archives&Subsection=Display&ARTICLE—ID=172233>.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Leadframe package for MEMS microphone assembly does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Leadframe package for MEMS microphone assembly, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Leadframe package for MEMS microphone assembly will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4143419

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.