Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...
Reexamination Certificate
2002-08-14
2003-11-25
Bradley, P. Austin (Department: 2833)
Electrical connectors
Preformed panel circuit arrangement, e.g., pcb, icm, dip,...
With provision to conduct electricity from panel circuit to...
C439S068000, C439S070000
Reexamination Certificate
active
06652291
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the field of semiconductor fabrication technology. More specifically, the present invention relates to an interposer for the electrically conductive connection of leads on leadframes of semiconductor chips.
In order to achieve a greater integration density in semiconductor components, semiconductor chips are also mounted vertically one above the other in stacks. U.S. Pat. No. 5,702,984 describes an integrated structure comprising a multiplicity of modularly constructed memory chips. Intermediate layers are situated between the chip carriers and they are provided with metalizations for the electrical connection and the interconnection of the chips. The metalizations are connected to one another by interconnects provided on the side of the semiconductor chip stack. U.S. Pat. No. 5,978,227 describes a vertically integrated configuration of semiconductor chips on leadframes, wherein laterally provided connecting contact springs have in each case upwardly or downwardly bent metal lugs with which the vertical electrical contact-making is effected on the side of the stack.
Electrical contact can be made with leads on leadframes of semiconductor chip housings also through the use of an interposer. Such an interposer is preferably composed of metal in order to have sufficient mechanical stability, on the one hand, and electrical conductivity, on the other hand. However, it suffices, in principle, for those portions of the interposer that are provided for the vertical conductive connection to be formed in electrically conductive fashion. The semiconductor chips are provided on a carrier, e.g. encapsulated with a potting compound, in a leadframe having outwardly directed leads. If the semiconductor chip housings are placed vertically one above the other, the associated leads must be electrically conductively connected to one another, which is done via the corresponding parts of the interposer. For this purpose, the interposer has contact regions on its mutually opposite surfaces. During the mounting of the semiconductor chip housings placed one above the other, the leads of the leadframes are pressed onto these contact regions, thereby establishing an electrically conductive contact. Since these contact regions are usually offset laterally relative to one another, when the housing stacks are pressed together, forces occur which lead to torques in the edge region of the interposer, which result in a strain or deformation of the interposer.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a leadframe interposer, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provides for an improved possibility for the assembly of semiconductor chip housings to form stacks, which improves in particular the vertical contact-making.
With the foregoing and other objects in view there is provided, in accordance with the invention, an interposer for the electrically conductive connection of leads on leadframes of semiconductor chips, the interposer having a planar extent and, on mutually opposite surfaces, electrically conductive contact regions. Furthermore:
a) a respective leadframe of a semiconductor chip is placed above and below the interposer and is connected to the interposer with pressure being exerted; and
b) an electrically conductive connection between leads of the leadframes is thus effected by the contact regions of the interposer; and
the interposer has at least one upset, which is formed and arranged in such a way that it engages on a housing of a semiconductor chip in a leadframe connected to the interposer.
In accordance with an added feature of the invention, the upset is formed with a level region oriented coplanar with respect to the planar extent of the interposer body and different from the contact regions.
In accordance with an additional feature of the invention, the upset is formed by at least one bead in a region of the interposer body different from the contact regions.
In accordance with another feature of the invention, the upset is formed by at least one bump in a region of the interposer body different from the contact regions.
In accordance with a further feature of the invention, the contact regions of the interposer body are offset with respect to one another in the planar extent of the interposer body, and the contact regions and the upset are arranged relative to one another such that a torque generated by forces exerted on the contact regions by the leadframes connected to the interposer is compensated for by a force exerted on the upset by at least one housing of one of the semiconductor chips in the leadframes.
In accordance with again an added feature of the invention, the contact areas are present on an outer edge of the interposer body and the upset is formed in a central region thereof.
In accordance with again another feature of the invention, a height, measured perpendicularly to the planar extent, is greater than a distance between the contact areas measured perpendicularly to the planar extent.
With the above and other objects in view there is also provided, in accordance with the invention, a stack of semiconductor chips, comprising:
an interposer having a generally planar extent with mutually opposite surfaces and being formed with electrically conductive contact regions on the mutually opposite surfaces
a first semiconductor chip with a leadframe having leads disposed on the interposer and a second semiconductor chip with a leadframe having leads disposed on the interposer opposite from the first semiconductor chip;
respective the contact regions of the interposer being electrically connected between respective the leads of the leadframes;
the interposer body being formed with at least one upset disposed to engage on a housing of a semiconductor chip in a leadframe connected to the interposer.
In other words, the interposer according to the invention is a leadframe interposer which is provided with an upset or a deformation. The upset is formed by shaping of the interposer in a central region. The upset alters the vertical position of the interposer in the central region and, during the assembly of the housing stack, presses against a topside or underside of a chip housing, so that a compensating further torque is exerted on the interposer, which prevents a possible strain or deformation when the leads are pressed onto the contact regions.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a leadframe interposer, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
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patent: 199 33 265 (2001-02-01), None
patent: WO 99/65062 (1999-12-01), None
IBM Technical Disclosure Bulletin: “Alterable Interposer Block For Personalizing Stacked Module Interconnections”, Vo. 30, No. 8, pp. 373-374.
Bradley P. Austin
Greenberg Laurence A.
Infineon - Technologies AG
León Edwin A.
Locher Ralph E.
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