Leadframe having one or more power/ground planes without vias

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

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Details

257691, H01L 2348

Patent

active

053861418

ABSTRACT:
Power and ground connections are provided using or more conductive layers provided in an integrated-circuit package design. A leadframe has either a tape assembly or a heat-conducting dielectric ceramic substrate attached to the die-attach paddle of the leadframe and one or more conductive planes are formed on the top surface of the tape assembly or the ceramic substrate. The tape assembly includes a conductive metal layer, a polyimide layer, and an adhesive layer. The metal layer on the tape or ceramic substrate and the metal die-attach pad of the leadframe are used as low inductance power planes providing connections to the integrated-circuit. No vias are used. Use of a metal die-attach paddle for the leadframe is optional when a ceramic substrate is used.

REFERENCES:
patent: 4714952 (1987-12-01), Takekawa et al.
patent: 4791473 (1988-12-01), Phy
patent: 5012323 (1991-04-01), Farnworth
patent: 5161304 (1992-11-01), Queyssac et al.
patent: 5196725 (1993-03-01), Mita et al.
patent: 5220195 (1993-06-01), McShane et al.

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