Leadframe for a multi-chip package and method for...

Details Leadframe for a multi-chip package and method for... Leadframe for a multi-chip package and method for...

2007-01-02

2007-01-02

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

Reexamination Certificate

active

11138491

ABSTRACT:
A leadframe for multi-chip package (MCP) including a die pad and a plurality of leads. A dielectric layer is formed on the lower surface of the die pad, so that the die pad is etched to form an interconnecting conductor with a bonding region. An insulation layer is formed on the interconnecting conductor and exposes the bonding region, so that a chip or a passive component can be electrically connected to the leads via the interconnecting conductor.

REFERENCES:
patent: 5674785 (1997-10-01), Akram et al.
patent: 6620633 (2003-09-01), Hembree et al.
patent: 6830955 (2004-12-01), Shin et al.
patent: 6933524 (2005-08-01), Hembree et al.
patent: 2002/0192859 (2002-12-01), Akram
patent: 2004/0198022 (2004-10-01), Alvarez

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