Leaded semiconductor device having accessible power supply pad t

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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Details

257698, 257780, H01L 2352, H01L 2304, H01L 2348, H01L 2940

Patent

active

055085563

ABSTRACT:
A semiconductor die (14) is mounted over a power supply surface (24, 52, 62). Signal bonding pads (18) on the die are wire bonded to corresponding leads (38) of a leadframe. Power supply bonding pads (20, 21) on the die are wire bonded to the power supply surface. A package body (22, 42, 56) surrounds the semiconductor die, the wire bonds (32, 34, 40, 40'), and the power supply surface. The power supply pad terminals are accessible from the bottom of the package body of the device through a plurality of conductive apertures (28, 56) disposed in the lower half of the package body. Power supply solder bumps (12, 58) are connected to the power supply surface inside the package body through the conductive apertures. The leads are used provide input and out signals for the device around the periphery of the device, while the solder bumps are disposed in an array format on the package body.

REFERENCES:
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patent: 4558346 (1985-12-01), Kida et al.
patent: 4700473 (1987-10-01), Freyman et al.
patent: 4975761 (1990-12-01), Chu
patent: 4992628 (1991-02-01), Beppu et al.
patent: 5157480 (1992-10-01), McShane et al.
patent: 5220195 (1993-06-01), McShane et al.
patent: 5239198 (1993-08-01), Lin et al.
patent: 5281556 (1994-01-01), Shimizu et al.
High Performance Multi Chip Carrier-IBM Technical Disclosure Bulletin vol. 33, No. 2, Jul. 1990.

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