Lead on chip semiconductor device having bus bars and crossing l

Details Lead on chip semiconductor device having bus bars and crossing l Lead on chip semiconductor device having bus bars and crossing l

1994-10-17

1996-08-27

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257692, 257691, 257776, H01L 2348

Patent

active

055504019

ABSTRACT:
Along the column of bonding pad (1), bonding terminal portions (2c), (3c), (4a), (5a) of bus bars (2), (3), and signal lines (4), (5) are arranged; principal wiring portions (2a), (3a) are made to extend in a 3-dimensional crossing configuration with respect to the signal lines, and they are connected to the bonding terminal portion of the bus bars, forming the IC package of the LOC type. Between the various bonding terminal portions and the various bonding pads, there exists no main wiring portion of the bus bar. Consequently, bonding wires (6), (7), (8), (9) do not straddle the bus bar principal wiring portion. As a result, when the bonding wire is not elevated, the bonding wire still does not make contact with the bus bar principal wiring portion to cause short circuit; as a result, the reliability is high and the device becomes thinner.

REFERENCES:
patent: 5068712 (1991-11-01), Murakami et al.
patent: 5206536 (1993-04-01), Lim
patent: 5227232 (1993-07-01), Lim
patent: 5252854 (1993-10-01), Arita et al.
patent: 5286999 (1994-02-01), Chiu

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