Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2007-05-08
2007-05-08
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S779000, C257S697000, C257S778000, C257S780000, C257SE23023, C420S562000
Reexamination Certificate
active
11167425
ABSTRACT:
A package substrate includes die solder pads and pin solder fillets. The pin solder fillets might comprise between approximately 90 wt % to approximately 99 wt % tin and approximately 10 wt % to 1 wt % antimony. The die solder pads might comprise between approximately 4 wt % to approximately 8 wt % bismuth, approximately 2 wt % to approximately 4 wt % silver, approximately 0 wt % to approximately 0.7 wt % copper, and approximately 87 wt % to approximately 92 wt % tin. The die solder pads might comprise between approximately 7 wt % to approximately 20 wt % indium, between approximately 2 wt % to approximately 4.5 wt % silver, between approximately 0 wt % to approximately 0.7 wt % copper, between approximately 0 wt % to approximately 0.5 wt % antimony, and between approximately 74.3 wt % to approximately 90 wt % tin.
REFERENCES:
patent: 6229207 (2001-05-01), Master
patent: 6365097 (2002-04-01), Yamashita et al.
patent: 6600233 (2003-07-01), Yeoh et al.
patent: 6911726 (2005-06-01), Rumer et al.
patent: 7102230 (2006-09-01), Yang
patent: 2001/0002982 (2001-06-01), Sarkhel et al.
patent: 2002/0142517 (2002-10-01), Maeda et al.
patent: 2002/0149113 (2002-10-01), Ray et al.
patent: 2004/0052678 (2004-03-01), Takesue et al.
patent: 2004/0155358 (2004-08-01), Iijima
patent: 2004/0195701 (2004-10-01), Attarwala
patent: 2004/0212094 (2004-10-01), Farooq et al.
patent: 2005/0006789 (2005-01-01), Tomono et al.
patent: 2005/0106059 (2005-05-01), Farooq et al.
patent: 08 148496 (1996-06-01), None
patent: WO 99/04048 (1999-01-01), None
Ning-Cheng Lee, “Lead-free soldering and low alpha solders for wafer level interconnects”, vol. XP009075177, Sep. 2000.
Anand Srinivasan Ashok
Master Raj N.
Mui Yew Cheong
Parthasarathy Srinivasan
Advanced Micro Devices , Inc.
Farjami & Farjami LLP
Parekh Nitin
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