Lead frame, semiconductor device, method of manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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C257S670000, C257S676000, C257SE23031

Reexamination Certificate

active

08039932

ABSTRACT:
A lead frame is provided which can prevent a short circuit between wires and the ends of adjacent leads, the short circuit being caused by wire sweep during the injection of molding resin, in a configuration where the electrodes of a semiconductor chip and the leads disposed around the semiconductor chip. The lead having sides substantially perpendicular to the direction of a resin flow has an end whose upstream side relative to the resin flow is constricted.

REFERENCES:
patent: 5633205 (1997-05-01), Tsuchiya et al.
patent: 5869355 (1999-02-01), Fukaya
patent: 5939774 (1999-08-01), Yamada
patent: 5955778 (1999-09-01), Shingai
patent: 6396139 (2002-05-01), Huang
patent: 1-133340 (1989-05-01), None
patent: 3-12448 (1991-02-01), None
patent: 6-291236 (1994-10-01), None
patent: 7-202104 (1995-08-01), None
patent: 11-67805 (1999-03-01), None
Kouyama, S. et al, “VLSI Packaging for Logic Device,” vol. 2, NIKKEI BP, Inc., 1993, pp. 165-170.

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