Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
1999-05-21
2001-05-15
Wong, Don (Department: 2821)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S736000
Reexamination Certificate
active
06232651
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a lead frame for semiconductor devices, and more particularly, to a lead frame in which a protection layer for protecting a nickel thin film layer deposited on the upper surface of a metal substrate is improved in applying a preplating method.
2. Description of the Related Art
Like semiconductor chips, a lead frame is essential to a semiconductor package, and supports a semiconductor chip and electrically connects the chip to an external circuit.
FIG. 1
shows an example of such a lead frame. As shown in
FIG. 1
, a lead frame
10
is comprised of a pad
11
, inner leads
12
, and outer leads
13
. This lead frame can be usually manufactured by stamping or etching.
As shown in
FIG. 2
, a semiconductor chip
40
is installed on the pad
11
, and wire-bonded to the inner leads
12
. The outer leads
13
are electrically connected to an external circuit. Then, the chip
40
and the inner leads
12
are molded by resin
14
to complete a semiconductor package
15
.
During the manufacture of the semiconductor package, the pad
11
and the ends of the inner leads
12
to be wire-bonded to the chip
40
are plated with a metal such as silver in order to provide a good wire bond property between the chip
40
and the inner leads
12
and good characteristics of the pad
11
. Also, a predetermined area of the outer leads
13
is soldered, i.e., plated with tin-lead (Sn—Pb) to improve solderability for mounting the semiconductor package on a substrate. However, such a process requires a wet process after the resin molding process, which degrades the reliability of completed products.
In order to solve the above problem, a preplating method has been proposed for pre-coating a solder-wettable material on a lead frame and forming an intermediate plated layer before a semiconductor packaging process.
FIGS. 3 and 4
show examples of a conventional lead frame manufactured by the preplating method. As shown in
FIG. 3
, a nickel thin intermediate layer
22
and an outermost palladium thin layer
23
are sequentially stacked on a metal substrate
21
made of copper or a copper alloy. As shown in
FIG. 4
, a thin layer
24
made of gold is formed on the upper surface of the palladium thin layer
23
.
In a lead frame
20
of
FIG. 4
configured as described above, the nickel thin layer
22
prevents copper or iron in the metal substrate
21
from diffusing to the surface of the lead frame, to thereby form copper oxides or copper sulfides. The palladium thin layer
23
prevents oxidation of the surface of the nickel thin layer
22
, and the gold thin layer
24
formed on the upper surface of the palladium thin layer
23
improves solderability.
However, during the manufacture of the lead frame
20
, when there is damage to the surface of the metal substrate
21
, a nickel layer on the damaged portion is more rapidly plated than on other neighboring portions due to a high surface energy of the damaged portion, which degrades cohesiveness of the damaged portion to the neighboring portion. In particular, in case that the surface of the nickel thin layer formed on the damaged portion is electrically plated with the palladium thin layer, a large amount of hydrogen is entrained during deposition of palladium because of the similarity between a palladium precipitation potential and a hydrogen precipitation potential, whereby damage to the palladium thin layer is accelerated. The damage to the palladium thin layer causes oxidation of the nickel layer to thus degrade solderability. Also, solderability can be degraded due to diffusion of components between plated layers caused by heat applied during a semiconductor manufacturing process.
A lead frame provided to solve the above problem has been disclosed in U.S. Pat. No. 5,360,991, in which a nickel thin layer is formed on the upper surface of a base metal, and a composite protection layer is formed on the upper surface of the nickel thin layer. The composite protection layer is comprised of a palladium or soft gold strike layer, a palladium-nickel alloy layer, a palladium layer, and a gold layer which are sequentially stacked on the nickel thin layer.
An example of another lead frame has been disclosed in U.S. Pat. No. 5,436,082, in which a nickel layer, a copper layer, a silver layer, and a palladium layer are sequentially stacked on the upper surface of a base metal.
The protection layer of each of the above-described conventional lead frames is comprised of a plurality of layers, resulting in a complicated manufacturing process and involving thermal migration from the protection layer to the outermost layer.
In an example of still another conventional lead frame, a gold thin layer can be formed on part of the external leads to protect the outermost palladium layer. In this case, the gold thin layer protects the palladium thin layer and also can reduce a wetting time by expediting smooth dissolution of palladium and lead upon initial wetting. However, use of a gold thin layer increases production costs and provides bad adhesiveness to molding resin, thus degrading the reliability of the semiconductor package. Also, there is a limit in making up for large and small cracks formed on a metal substrate during banding of the lead frame, and these cracks accelerate corrosion and oxidation of the lead frame. Furthermore, the gold thin layer forms Au—Sn together with tin (Sn) of a solder, thereby degrading solderability for mounting a semiconductor package on a substrate.
SUMMARY OF THE INVENTION
To solve the above problems, it is an objective of the present invention to provide a lead frame for semiconductor devices by which corrosion resistance, solderability, and productivity can be improved.
Accordingly, to achieve the above objective, there is provided a lead frame for semiconductor devices comprising: a metal substrate having inner leads and outer leads; a nickel thin layer formed on the metal substrate; an outer layer formed of palladium or a palladium alloy on the nickel thin layer; and a protection layer formed of gold or platinum between the nickel thin layer and the outer layer.
REFERENCES:
patent: 4068022 (1978-01-01), Glick
patent: 5360991 (1994-11-01), Abys et al.
patent: 5436082 (1995-07-01), Mathew
Lee Kyu-han
Park Se-chul
Clinger James
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Samsung Aerospace Industries Ltd.
Wong Don
LandOfFree
Lead frame for semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Lead frame for semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lead frame for semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2494237