Lead frame assemblies with voltage reference plane and IC packag

Details Lead frame assemblies with voltage reference plane and IC packag Lead frame assemblies with voltage reference plane and IC packag

1997-07-02

1999-09-21

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257676, 257691, H01L 23495

Patent

active

059557770

ABSTRACT:
A semiconductor die assembly employing a voltage reference plane structure electrically isolated from, but in immediate proximity to, leads of a lead frame to which the die is electrically connected. A non-conductive adhesive or an adhesively-coated dielectric film is used to position the voltage reference plane on the leads. The voltage reference plane is electrically connected to a ground or other reference potential pin of the die through a connection to one of the leads. The assembly is encapsulated, preferably by transfer-molding of a filled polymer. More than one discrete voltage reference plane structure may be employed, for example, when the package is of an LOC configuration with two rows of leads, each having a voltage reference plane secured thereto, or a single voltage reference plane including major portions adhered to leads and interposed connection portions may be applied to all of the leads of an assembly.

REFERENCES:
patent: 4024570 (1977-05-01), Hartmann et al.
patent: 5214845 (1993-06-01), King et al.
patent: 5233220 (1993-08-01), Lamson et al.
patent: 5378924 (1995-01-01), Liang
patent: 5379187 (1995-01-01), Lee et al.
patent: 5387554 (1995-02-01), Liang
patent: 5498901 (1996-03-01), Chillara et al.
patent: 5541446 (1996-07-01), Kierse
patent: 5559306 (1996-09-01), Mahulikar
patent: 5701034 (1997-12-01), Marrs

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