Lead frame and manufacturing method thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S112000, C257S666000, C257S676000

Reexamination Certificate

active

06391684

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to lead frames and the manufacturing method thereof, and more particularly, to a lead frame in which the inner leads of the leads connect to electrodes of a semiconductor chip and the outer leads of the leads connect to electrodes of a printed circuit board or the like through protruding electrodes and the manufacturing method thereof.
2. Description of the Related Art
An example of a connection between a semiconductor chip and a printed circuit board or the like through an organic substrate having protruding electrodes such as solder balls is disclosed in U.S. Pat. No. 5,136,366. The structure of this conventional example will be described below by referring to its cross section shown in FIG.
1
.
In
FIG. 1
, a semiconductor chip “b” is mounted on a surface of a multilayer organic wiring substrate “a” having about two to six layers and using an organic material. Wiring film “c” formed on the surface of the substrate “a” is connected to electrodes of the semiconductor chip “b” through connection wires “d” made of gold or the like.
Solder balls “e” formed on the opposite surface of the substrate “a” are electrically connected to the wiring film “c” via through holes. There is also shown solder resist film “f,” sealing resin “g,” and a printed circuit board “h.”
In the conventional example shown in
FIG. 1
, the multilayer organic wiring substrate “a” with which the semiconductor chip “b” is mounted and resin-sealed on the main surface and the solder balls “e” serving as protruding electrodes are formed on the other surface is connected to the printed circuit board “h” with the solder balls “e.”
Since electrodes of the semiconductor chip “b” are connected to the wiring film “c” on the multilayer organic wiring substrate “a” called BGA through the connection wires “d,” made of gold or the like, parasitic resistance inevitably becomes large. In addition, a wire-bonding process is required, which requires time which cannot be ignored, thus being a factor for increasing cost.
Since the semiconductor chip “b” is mounted and resin-sealed on the main surface of the substrate “a,” it is difficult to respond to an increasing demand for making semiconductor devices thinner.
There are also other drawbacks related to the multilayer organic wiring substrate “a.” These are a very high manufacturing cost due to the complicated manufacturing process, a high defect rate which cannot be ignored due to its tendency to generate warps, and a probability of water invasion from the side faces of the substrate.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a highly reliable lead frame and the manufacturing method thereof which respond to a demand for making semiconductor devices thinner and more inexpensive.
The foregoing object is achieved according to one aspect of this invention through the provision of a lead frame wherein a number of leads having their inner leads extending over a device hole are connected to electrodes of a semiconductor chip and their outer leads are connected to protruding electrodes are formed on a surface of protective insulation film having the device hole, the outer leads being provided with the protruding electrodes on the surface opposite the surface which is closer to the protective insulation film.
In the lead frame, a reinforcement plate may be formed on the surface opposite the surface of the protective insulation film on which the leads are formed.
The foregoing object is achieved according to another aspect of the present invention through the provision of a manufacturing method of the lead frame, comprising the processes of: forming a number of leads on an etching stopper layer above a surface of a lead-forming substrate; adhering the protective insulation film having the device hole on the surface of the leads opposite the surface closer to the lead-forming substrate; eliminating areas of the lead-forming substrate used for forming the leads by etching from the rear side; and forming the protruding electrodes on the outer leads of the leads.
The foregoing object is achieved according to still another aspect of the present invention through the-provision of a manufacturing method of the lead frame, comprising the processes of: forming a number of leads on an etching stopper layer above a surface of a lead-forming substrate; half-etching the rear surface of the lead-forming substrate corresponding to lead-forming areas; forming a solder resist having openings at positions where the protruding electrodes are to be formed, on the lead-forming surface of the lead-forming substrate; forming the protruding electrodes on the leads with the electrolytic plating method using the solder resist as a mask; etching the remaining areas on the rear surface of the lead-forming substrate corresponding to the lead-forming areas; and adhering the protective insulation film having the device hole on the surface of the leads opposite the surface on which the protruding electrodes are formed.
The foregoing object is also achieved according to a further aspect of this invention through the provision of a lead frame wherein a solder resist having openings for exposing outer leads is formed on one surface of a number of leads and protruding electrodes are formed at the exposed outer leads.
The foregoing object is achieved according to a still further aspect of this invention through the provision of a manufacturing method of the lead frame, comprising the processes of: forming a number of leads on an etching stopper layer above a surface of a lead-forming substrate; forming a solder resist having openings at positions where the protruding electrodes are to be formed, on the lead-forming surface of the lead-forming substrate; forming the protruding electrodes on the leads with the electrolytic plating method using the solder resist as a mask; and etching the remaining areas on the rear surface of the lead-forming substrate corresponding to the lead-forming areas.
With the-above-described structure, the leads comprising the single-layer wiring film formed on the surface of the protective insulation film intervene between electrodes of the semiconductor chip and protruding electrodes, instead of using a multilayer organic wiring substrate, reducing the cost. In addition, since the leads have a single layer, water cannot invade between layers, increasing humidity-proofness and water-proofness. By placing a semiconductor chip in the device hole, which is provided for the protective insulation film, the semiconductor device can be made thinner.
Since the reinforcement plate is adhered to the rear surface of the protective insulation film, the lead frame is effectively prevented from being deformed and broken in the manufacturing process of the lead frame, and the mounting and resin-sealing processes of the semiconductor chip.
With a manufacturing method for the lead frame according to the present invention, since the leads are formed on the etching stopper layer above the lead-forming substrate, the leads can be made fine and they are prevented from being deformed in manufacturing even if they are thin because the lead-forming substrate functions as a support. Since the protective insulation film or the multilayer member comprising the protective insulation film and the reinforcement plate is formed on the leads, which are prevented from being deformed by the lead-forming substrate, the leads
3
are prevented from being deformed in forming processes such as that for the protective insulation film.
With a manufacturing method according to the present invention, since the etching stopper layer is made from an electrically conductive material and the protruding electrodes are formed before the process for etching the etching stopper layer, with the leads being used as masks, the etching stopper layer can be used as a path for applying the voltage required for electrolytic plating the portions where the protruding electrodes are to be formed, therefore enabling the protr

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