LDMOS transistor with self-aligned source/backgate and photo-ali

Details LDMOS transistor with self-aligned source/backgate and photo-ali LDMOS transistor with self-aligned source/backgate and photo-ali

1994-09-09

1996-02-13

Thomas, Tom

Fishing, trapping, and vermin destroying

437 27, 437 29, 437 40, 437 44, 437 51, 148DIG151, H01L 21822

Patent

active

054911052

ABSTRACT:
An embodiment of the present invention is a method of fabricating power and non-power devices on a semiconductor substrate, the method comprising: forming alignment marks in the substrate (100); introducing a dopant of a first conductivity type into the substrate to form high-voltage tank regions (103); annealing the dopants (105); introducing dopants of the first conductivity type and a second conductivity type in a region in the high-voltage tank region (109); annealing the dopants of the first and the second conductivity type to form a second region within a third region, both within the high-voltage tank region, due to the different rates of diffusion of the dopants (110); and forming gate structures after the annealing of the dopants of the first and second conductivity types (122).

REFERENCES:
patent: 4413401 (1983-11-01), Kliem et al.
patent: 4795716 (1989-01-01), Yilmaz et al.
patent: 4931406 (1990-06-01), Tomioka

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