LDD field effect transistor having a large reproducible saturati

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357 41, H01L 2978

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active

051327570

ABSTRACT:
An LDD field effect transistor is fabricated by a series of process steps in which throughout the fabrication process, the transistor's polysilicon gate is protected from being oxidized on its edges near the gate insulator. Some of the process steps during which the above protection occurs includes steps for forming spacers on the sidewalls of the transistor's gate, and steps for activating the LDD source-drain regions with high temperature anneals. Due to this protection from oxidation, none of the silicon in the edges of the gate is consumed or converted to silicon dioxide at any stage of the fabrication process. Consequently, the distance by which the edges of the gate are spaced over the channel remains unaltered throughout the fabrication process; and, this physical feature of the gate makes the transistor's saturation current large with little variance.

REFERENCES:
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patent: 4855247 (1989-08-01), Ma et al.
patent: 4894694 (1990-01-01), Chan et al.
patent: 4906589 (1990-03-01), Chao
patent: 4912061 (1990-03-01), Nasr
patent: 4948744 (1990-08-01), Kita
IEEE Transactons on Electron Devices, vol. ED-29, No. 4, Apr. 1982, "Fabrication of High-Performance LDD FET's with Oxide Sidewall-Spacer Technology" by Tsang et al, pp. 590-596.
IEDM, 1984, "Characterization of As-P Double Diffused Drain Structure" by Balasubramanyam et al, pp. 782-785.

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