LCD panels including interconnected test thin film...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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Details

C324S701000

Reexamination Certificate

active

06590624

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to liquid crystal display (LCD) panels and more particularly to testing of LCD panels.
BACKGROUND OF THE INVENTION
LCD panels are widely used as flat panel display devices. As is well known to those having skill in the art, an LCD panel includes a pixel region, also known as an active region, which includes an array of pixel thin film transistors and intersecting arrays of spaced apart data lines and gate lines that are connected to the array of pixel thin film transistors. The array of pixel thin film transistors, data lines and gate lines form an array of addressable pixels.
In fabricating LCD panels, a gross test is generally carried out in order to check the operation of the pixels of an LCD panel prior to mounting driver integrated circuit chips to the LCD panel. Thus, defective LCD panels can be identified prior to mounting driver chips to the panel. In order to perform a gross test of the pixels, all of the gate lines and data lines generally are energized so that defective pixels can be readily identified by visual inspection of the panel.
LCD panels may be classified in two general types, depending upon the configuration of driver chips that are mounted on the LCD panel. In one panel type, tape automated bonding (TAB) is used to mount driver chips on the LCD panel. In a second panel type, chip on glass (COG) technology is used to mount driver chips on the LCD panel. Depending on the type of LCD panel, gross testing may be performed differently.
Each of the types of LCD panels, and conventional gross testing thereof will now be described. In general, pin contact testing is applied to TAB LCD panels and conductive rubber pad testing is generally applied to COG technology.
FIG. 1
illustrates a conventional LCD panel using TAB mounting technology. In TAB mounting technology, the LCD panel is connected to the TAB driver chips using a conductive film. The TAB driver chips are generally connected to a printed circuit board. Referring now to
FIG. 1
, an LCD panel
10
includes a substrate
11
such as a glass substrate including a pixel region
13
. As already described, the pixel region
13
includes therein an array of pixel thin film transistors and intersecting arrays of spaced apart data lines and gate lines connected to the array of pixel thin film transistors. In the LCD panel of
FIG. 1
, the gate lines extend horizontally and the data lines extend vertically. A color filter substrate may be included on the glass substrate
11
. The color filter substrate may include color filter patterns.
Still referring to
FIG. 1
, the gate lines
15
extend outside the pixel region
13
to a gate line area
17
on substrate
11
. As shown, the gate lines may extend outside the pixel region at opposite sides thereof. Similarly, the data lines
19
extend outside the pixel regions
13
into a data line area
21
. The data lines
19
may also extend beyond the pixel region at the opposite side thereof.
In order to perform a gross test on the LCD panel
10
, respective ends of the gate lines
15
are connected to a gate contact line
23
in the gate line area
17
. Similarly, the respective ends of the data lines
19
are connected to a data contact line
25
in the data line area
21
. Voltage is supplied to the gate lines
15
and the data lines
19
through the gate contact line
23
and the data contact line
25
during the gross test. A gate pin contact pad
24
and a data pin contact pad
26
are respectively formed at the ends of the gate contact line
23
and the data contact line
25
. Probes from a test fixture contact the respective contact pads
24
and
26
during testing.
In order to test the LCD panel
10
, power is supplied to the gate contact line
23
and the data contact line
25
by contacting probes from a test fixture to the gate pin contact pad
24
and the data pin contact pad
26
. When power is applied to the gate pin contact pad
24
and the data pin contact pad
26
, current flows through all of the gate lines
15
and all of the data lines
19
. This causes all of the pixel thin film transistors in the array to be energized to thereby activate all of the pixels. For example, for an LCD panel that is normally white, all of the pixels will change to black. Conversely, for an LCD panel that is normally black, all of the pixels will change to white. If there is a defect in the data lines, gate lines or any of the pixel thin film transistors in the array, one or more of the pixels will remain in its original state. It is therefore possible to visually discriminate good LCD panels from defective LCD panels by monitoring the displayed state of the pixels.
After completion of the gross test, it is generally desirable to be able to address each of the data lines and gate lines individually for normal operation. Accordingly, the gate contact line
23
and the data contact line
25
are removed from the substrate
11
prior to attaching the driver chips in the gate area
17
and the data area
21
. Glass cutting may be used to cut the substrate
11
along dashed lines
27
to remove the portion of the substrate including the gate contact line
23
, gate pin contact pad
24
, data contact line
25
and data pin contact pad
26
. Alternatively, laser cutting may be used to cut the data lines
19
and the gate lines
15
in the data line area
21
and the gate line area
17
respectively, to thereby electrically disconnect the data contact line
25
and the gate contact line
23
from the data lines
19
and gate lines
15
, respectively.
Unfortunately, each of these cutting operations may adversely impact the LCD panel. More specifically, when using the glass cutting, glass particles may contaminate the LCD panel. Laser cutting may be slower and more expensive so that increased cost may result. Moreover, both of these operations use additional mechanical steps to physically disconnect the gate contact line
23
and the data contact line
25
from the gate lines
15
and the data lines
19
, respectively. These additional operations can result in decreased yields for the LCD panels, and in increased costs.
Gross testing of COG LCD panels will now be described. As shown in
FIG. 2A
, a conventional COG LCD panel
30
includes a substrate
31
and a pixel region
33
as already described. A color filter substrate may also be attached to the glass substrate
31
. A gate line area
35
is provided outside the pixel region
33
and a data line area
37
is provided outside the pixel region
33
. In gate line area
35
, a plurality of gate lines
39
end in multi-sided subgroups of gate lines. In
FIG. 2A
, two multi-sided subgroups of gate lines are shown however it will be recognized that more subgroups may be provided. One or more gate driver chips may be attached to a multi-sided gate line subgroup.
Similarly, in the data line area
37
a plurality of data lines
41
end in a plurality of multi-sided data line subgroups. Four multi-sided subgroups are shown in data line area
37
, but fewer or more subgroups can be used. Driver chips are attached to the data lines in the multi-sided subgroups. As also shown in
FIGS. 2A-2B
, bonding pads
43
are generally formed at the ends of the data lines
41
and gate lines
39
to facilitate bonding of the chips to the bonding pads
43
.
A test apparatus or fixture for performing gross tests on the LCD panel
30
of
FIG. 2A
generally uses spaced apart conductive rubber pads to simultaneously energize the bonding pads
43
. A schematic prospective view of a gross test fixture for testing the LCD panel of
FIG. 2A
is shown in FIG.
3
.
As shown in
FIG. 3
, the test fixture
50
includes a base
51
having a recessed portion
58
. Printed circuit boards
53
project from the bottom of the recessed portion
58
of the base
51
to support and test the LCD panel
30
. Guide projections
55
are formed along the edges of the printed circuit boards
53
, to hold the LCD panel
30
in place between the printed circuit boards
53
.
Still referring to
FIG. 3
, conductive rubber pads
57
a

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