LCD panel test system and test method thereof

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters

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324500, 324537, 324548, 345904, G01R 3102, G01R 3128, G02F 113, G09G 300

Patent

active

059949163

ABSTRACT:
An LCD panel test system for measuring voltages in the pixels of LCD with high signal to noise (S/N) ratio. The LCD test system includes a sweep timing generator for generating clock signals and control signals for driving pixels in an LCD panel, a driver for generating a reference voltage to be supplied to the pixels in the LCD, a current-voltage (IV) conversion circuit for receiving a signal from the pixels to convert the same to a corresponding voltage signal, a sample and hold circuit for sampling the voltage signal from the IV conversion circuit and temporarily holding the sampled voltage, an A/D converter for converting the sampled voltage to a digital signal, and an image processor for processing the digital signal from the A/D converter to detect defective pixels in the LCD panel based on relative levels of the output signals from the video terminal.

REFERENCES:
patent: 5506516 (1996-04-01), Yamashita et al.
patent: 5576730 (1996-11-01), Shimada et al.
patent: 5608558 (1997-03-01), Katsumi

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