LCD driving circuitry with reduced number of control signals

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C345S100000

Reexamination Certificate

active

06437766

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an active matrix liquid crystal display device made up of an active matrix array provided with switching elements at each intersection between a plurality of scanning lines and a plurality of signal lines, a vertical drive circuit for driving the scanning lines, and a horizontal drive circuit for driving the signal lines; and to a method of driving such a liquid crystal display device.
BACKGROUND OF THE INVENTION
Recent years have seen increasing demand for liquid crystal display devices which are compatible with personal computers or work stations, televisions, etc. having different video frequencies, numbers of pixels, and scanning methods.
In order for a single liquid crystal display device to achieve compatibility with a variety of sources such as the foregoing personal computers or workstations, televisions, etc., the liquid crystal display device must perform a variety of scanning methods, such as interlace driving, two-line simultaneous driving, non-interlace driving, etc., as will be explained below.
For compatibility with the foregoing personal computers or workstations, sequential scanning must be performed, in which lines are scanned sequentially, regardless of whether they are odd-numbered or even-numbered lines. For compatibility with existing televisions or hi-vision televisions, on the other hand, interlace scanning must be performed, in which the pixels of odd-numbered lines are sequentially scanned during an odd-number field, and the pixels of even-numbered lines are sequentially scanned during an even-number field.
Further, there are also cases when two-line simultaneous scanning is performed, in which, when scanning an odd-numbered line during the odd-number field, the next even-numbered line is also scanned and the same signal is written therein, and when scanning an even-numbered line during the even-number field, the next odd-numbered line is also scanned and the same signal is written therein. Thus liquid crystal display devices compatible with this scanning method are also called for.
Further, liquid crystal display devices are called for which are capable of each of the foregoing scanning methods, and also of enlarged display, movement, black display writing, bi-directional scanning, etc.
Again, with the aim of reducing the size and cost of liquid crystal display devices, research is also in progress to develop techniques for integrating peripheral drive circuits onto the same substrate with the liquid crystal display device. Peripheral drive circuits are divided into a vertical drive circuit, which scans the gates of thin film transistors (TFTs) making up an active matrix array, and a horizontal drive circuit, which supplies video signals to pixels.
This type of liquid crystal display device is disclosed in, for example, Japanese Unexamined Patent Publication No. 8-122747/1996 (Tokukaihei 8-122747). The following will explain this conventional liquid crystal display device.
The foregoing conventional liquid crystal display device, as shown in
FIG. 31
, includes an active matrix array
201
made up of TFTs, one provided at each intersection between scanning lines and signal lines, a vertical drive circuit
202
for driving the scanning lines, and a horizontal drive circuit
203
for driving the signal lines. In this conventional liquid crystal display device, there are 1,024 scanning lines.
In the foregoing conventional liquid crystal display device, as shown in the Figure, the vertical drive circuit
202
is made up of 256 scanning circuits
204
-
1
through
204
-
257
having a half-bit structure (hereinafter referred to as “half-bit scanning circuits”), which sequentially shift a pulse signal inputted from an input terminal a or an input terminal b in synchronization with a clock signal; NAND gate circuits
205
-
1
through
205
-
1024
, which receive signals P
1
, P
2
, . . . , P
256
outputted by the half-bit scanning circuits
204
-
1
through
204
-
257
and control signals G
1
, G
2
, . . . , G
8
; and output buffers
206
, which receive signals outputted by the NAND gate circuits
205
-
1
through
205
-
1024
.
In the foregoing conventional liquid crystal display device, four NAND gate circuits
205
are connected to each half-bit scanning circuit
204
-
1
through
204
-
257
, and every eight adjacent NAND gate circuits
205
receive different respective control signals G
1
through G
8
.
Further, each of the half-bit scanning circuits
204
-
1
through
204
-
257
is capable of bi-directional scanning. Accordingly, a pulse signal is inputted from the input terminal a when scanning in one direction, and from the input terminal b when scanning in the other direction.
The half-bit scanning circuits
204
-
1
through
204
-
257
are circuits driven by two clock signals of different respective phase. Consequently, the number of driving signals necessary to drive the half-bit scanning circuits
204
-
1
through
204
-
257
, including the pulse signal inputted when scanning in the other direction, are two clock signals and two input signals, or a total of four signals. Further, when the control signals G
1
through G
8
for the NAND gate circuits
205
-
1
through
205
-
1024
are included, the total number of driving signals inputted to the vertical drive circuit
202
is
12
signals. This number of signals does not change even when the number of scanning lines exceeds 1,024.
FIG. 32
shows one example of a driving method for the conventional liquid crystal display device shown in FIG.
31
. The following will explain, with reference to
FIG. 32
, a method of driving the conventional liquid crystal display device shown in FIG.
31
.
First, as shown in
FIG. 32
, a clock signal CLK having a clock cycle of 8T (T being a scanning line selection period) and an input pulse signal VSTa from the input terminal a having a pulse width of 8T are sent to the half-bit scanning circuits
204
-
1
through
204
-
257
with the timings shown in the Figure, and thus the input pulse signal VSTa is sequentially shifted in synchronization with the clock signal CLK.
Consequently, the signals P
1
through P
256
outputted by the respective half-bit scanning circuits
204
-
1
through
204
-
257
, as shown in the Figure, are pulse signals having a pulse width of 8T and phases sequentially shifted 4T each.
Meanwhile, as the control signals G
1
through G
8
, pulse signals having a pulse width of T, a pulse cycle of 8T, and phases sequentially shifted T each are sent to the NAND gate circuits
205
-
1
through
205
-
1024
with the timings shown in the Figure. As a result, signals GP
1
through GP
1024
outputted by the respective output buffer circuits
206
are pulse signals having a pulse width of T and phases sequentially shifted T each.
The foregoing driving method explains signals used in sequential scanning.
Further, there is also a demand for liquid crystal display devices which are freely capable of enlarged display of images having fewer pixels than the liquid crystal display device. Such liquid crystal display devices are usually realized by modifying the structure of the vertical drive circuit or the driving method.
Further, when displaying an image having fewer pixels than the liquid crystal display device, in order to show black display in unused areas above, below, to the right, and to the left of the area used for liquid crystal display, it is necessary to perform writing of black display to the pixels of the unused areas during a blanking period.
Further, in liquid crystal projector devices, which in recent years are seeing increased use as large-screen displays, presentation displays, etc., it is necessary for one of the three liquid crystal panels corresponding to R, G, and B to reverse its display using a mirror, because of differences in reflection of light transmitted through the liquid crystal display device and in the number of times the light is refracted. In addition, there is a demand for flexible liquid crystal display devices capable of both front and rear projection, and of both floor

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

LCD driving circuitry with reduced number of control signals does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with LCD driving circuitry with reduced number of control signals, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and LCD driving circuitry with reduced number of control signals will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2952583

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.