Layout structure of fuse bank of semiconductor memory device

Details Layout structure of fuse bank of semiconductor memory device Layout structure of fuse bank of semiconductor memory device

2007-08-28

2007-08-28

Hu, Shouxiang (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S209000, C257S530000

Reexamination Certificate

active

10620015

ABSTRACT:
A fuse bank of a semiconductor memory device is provided. The fuse bank includes first and second laser fuses. The first laser fuse includes a first laser fusing region disposed in a first direction, a first connecting line region bent in a second direction, and a second connecting line region bent in a third direction. The second laser fuse includes a second laser fusing region disposed in the first direction, a third connecting line region bent in the second direction, and a fourth connecting line region bent in the third direction. The first laser fuse and the second laser fuse have a space of a predetermined distance there between. The first and second laser fusing regions form a laser fusing region of the fuse bank, and the first and second laser fuse are disposed on a plane. The fuse bank is embodied on a single layer.

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English language abstract of the Korean Publication No. 2001-29286.
English language abstract of the Japanese Publication No. 2002-76122.

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