Layout of a thin film transistor and the forming method thereof

Details Layout of a thin film transistor and the forming method thereof Layout of a thin film transistor and the forming method thereof

2005-11-01

2005-11-01

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Amorphous semiconductor material

C257S055000, C257S057000, C257S072000, C257S339000, C349S038000

Reexamination Certificate

active

06960789

ABSTRACT:
A transistor that at least has one of the following characteristics: First, the gate electrode is located outside the gate line, such that the whole transistor is located outside the gate line. Second, the projection of the semiconductor layer on the substrate is totally located inside the projection of the gate electrode on the substrate. Third, the drain cross the gate electrode, such that the projection of the cross-section is totally located inside the projection of the gate electrode. Final, the separated distance between the gate line, the gate electrode, the drain and the source is adjusted to let the variation of each of Cgd and Cds be not obviously affected by the alignment deviation.

REFERENCES:
patent: 4600274 (1986-07-01), Morozumi
patent: 4859623 (1989-08-01), Busta

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