Layout designing method of a display device

Radiation imagery chemistry: process – composition – or product th – Registration or layout process other than color proofing

Reexamination Certificate

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C430S030000

Reexamination Certificate

active

06361908

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to layout designing method of a display device.
BACKGROUND OF THE INVENTION
In a liquid display device using a TFT (thin film transistor) as a switching element, for instance, four panels
12
are prepared on a sheet of glass plate
11
as shown in FIG.
1
. Each of the panels
12
is divided into, for instance, four shot areas (A, B, C, D) as shown in FIG.
2
.
FIG. 3
shows a panel
12
in an enlarged form. In
FIG. 3
, in a display section of each of the shot areas
12
a
,
12
b
,
12
c
, and
12
d
indicated by the signs A, B, C, and D, a TFT switching pattern
13
, a pixel pattern
14
, or the like are formed as shown in FIG.
4
. The TFT switching pattern
13
is formed with a layer construction consisting of 3 to 7 layers with such components as a gate bus line
13
g
or a drain bus line
13
d .
In the layout designing method based on the conventional technology, at first panel data concerning TFTs or pixels in a display device is prepared, and then one sheet of panel
12
is divided with a division tool or the like into a plurality of shot areas
12
a
,
12
b
,
12
c
, and
12
d
. However, if the gate bus line
13
g
or drain bus line
13
d
is divided at a place where a switching performance of a transistor is badly affected, or if one pixel pattern
14
is divided into two sections, characteristics of the pixel at such a place changes, which in turn may cause non-uniformity in display.
To prevent generation of this non-uniformity in display, it is necessary to divide a G layer in which the gate bus line
13
g
is formed along a first division line A—A evading the gate electrode section as shown in FIG.
5
. Regarding I layer in which the drain bus line
13
d
is formed, it is necessary to divide this I layer along a second division line B—B evading the source/drain area. Regarding Px layer in which the pixel pattern is formed, it is necessary to divide this Px layer along a third division line C—C so that a single pixel will not be divided.
In other layers not shown in these figures, there are line positions suited to division, and the division line positions are generally different from layer to layer. In other words, it is impossible to divide one panel into a plurality of shot areas by setting the same division line for all layers.
Therefore, in the conventional technology, appropriate division line is set for each layer. Following procedure is employed when manufacturing a display device. That is, as shown in
FIG. 6
, reticules
13
a
,
13
b
,
13
c
,
13
d
corresponding to the shot areas
12
a
,
12
b
,
12
c
,
12
d
indicated by the signs A, B, C, D are prepared for each layer, and exposure is made to resist applied on the glass plate
11
using these reticules
13
a
,
13
b
,
13
c
, and
13
d
successively and with an exposure device such as a stepper.
The layout designing method based on the conventional technology is described below with reference to
FIG. 7
to FIG.
15
B.
FIG. 7
is a flow chart showing a flow in reticule preparation based on the conventional type of layout designing method.
FIG. 8
to
FIG. 15B
show examples of geometrical patterns so that the flow chart above can easily be understood.
The examples of geometrical pattern shown in
FIG. 8
are based on the assumption that a panel
21
is divided into four sections and comprises two layers, namely a G layer in which a heart-shaped pattern
22
is formed and an I layer in which a square pattern
23
is formed. As shown in
FIG. 9
, G
1
-G
2
and I
1
-I
2
are division lines for the G layer and I layer respectively. It is assumed that there occurs no functional problem in the panel pattern shown in the figure.
When layout designing is started, at first, panel data is prepared as shown in
FIG. 7
(step S
1
). FIG.
8
. shows a panel image prepared based on the panel data. At the next step, all layers are divided into a plurality of areas respectively (step S
2
).
FIG. 9
shows divided images of all layers, namely the G layer and I layer in this example.
Images for the shot areas obtained by dividing the panel are located in data concerning the reticule image, thus a reticule image being prepared (step S
3
). Process patterns such as an alignment mark are prepared at the same time.
At the next step, a single layer, for instance, the G layer is divided (step S
4
).
FIG. 10
shows an image
24
of those obtained by dividing the G layer to four sections.
FIG. 10
to
FIG. 15B
show only GA and IA shot areas positioned at the light upper section of the
FIG. 9
together with the G layer and I layer. A shading band (described as blind pattern hereinafter) and an auxiliary pattern are added to a section around the four images obtained by dividing the G layer (step S
5
).
FIG. 11
shows a state where a blind pattern
25
is added to a divided image for the shot area GA in the G layer.
At the next step, whether all of the layers have been divided or not is determined (step S
6
). In this example, as the I layer has not been divided, the processing at step S
4
is executed to divide the I layer.
FIG. 12
shows an image
26
of the shot area IA among the four areas obtained by dividing the I layer. At the next step, a blind pattern and an auxiliary pattern are added to a section around the four images obtained by dividing the I layer (step S
5
).
FIG. 13
shows a state where a blind pattern
27
is added to a divided image
26
of the shot area IA in the I layer.
The processing from step S
4
to step S
6
is repeated until all of the layers are divided, and when all of the layers are divided, preparation of designing data is finished (step S
7
). FIG.
14
A and
FIG. 14B
show the prepared designing data
28
,
29
for the G layer and I layer respectively.
Based on the prepared designing data, exposure data and reticules are prepared (step S
8
). FIG.
15
A and
FIG. 15B
show exposure data and reticules
30
,
31
for the G layer and I layer respectively.
In the layout designing method based on the conventional technology as described above, the processing for division is executed by setting divided areas for each layer taking into account a switching pattern or a pixel pattern, so that the processing for division is required to be executed repeatedly until all layers have been divided. Time required for dividing one layer is around 1 hour. Therefore, for instance, for a 15-inch display device comprising 5 layers about five hours are required until the processing for dividing all of the layers is finished.
Therefore, although reduction of production cost and designing cost for a display device is strongly desired recently, it has been difficult to reduce the designing cost.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a layout designing method of a display device which makes it possible to shorten time required for designing a display device and also to reduce the designing cost.
To achieve the object described above, in the layout designing method of a display device according to one aspect of the present invention, when designing a display panel comprising a plurality of layers and designed by dividing each layer to a plurality of short areas, a suspected division area is set so that shot areas corresponding to all layers are included, all of the layers are divided in batch along the suspected division area, and by treating a portion not included in a shot area of each layer in the suspected division area obtained as described above, an unnecessary portion is hid.
In the layout designing method of a display device of another aspect of the present invention, when designing a display panel comprising a plurality of layers and designed by dividing each layer to a plurality of short areas, all of divided areas in all layers are aligned to each other by aligning other layers to a reference layer, and all of the layers are divided in batch along the aligned areas.
Shot areas are positioned at reticules by offsetting each shot area by a rate of displacement of other layers to the reference layer. Or, a rate o

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