Layout arrangement of current sources in a current-mode...

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Reexamination Certificate

active

06317066

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of digital-to-analog (D/A) converters and, more particularly, to the layout arrangement of current sources in a current-mode D/A converter.
2. Description of Related Art
Current-mode D/A converters have become popular in recent years due to the increase in digital audio and video applications. A schematic circuit diagram of a conventional 8-bit D/A converter is shown in FIG.
7
. This D/A converter has two 4-to-15 converters
71
and
72
for converting an 8-bit input code, denoted by I
0
~I
7
, into a thermal code. The converter
71
converts the most significant bits (hereinafter abbreviated as MSB)
14
~
17
of the input code into 15 MSB outputs M
1
~M
15
. Also, the converter
72
converts the least significant bits (hereinafter abbreviated as LSB) I
0
~I
3
of the input code into 15 LSB outputs L
1
~L
15
. These outputs M
1
~M
15
and L
1
~L
15
are referred to as the thermal code, which is characterized by the fact that only one of the outputs changes state when the input code is incremented so as to prevent a sudden change from occurring in output current.
Such a D/A converter further includes 15 MSB current sources
73
and 15 LSB current sources
74
. Each of MSB current sources
73
corresponds to one of the MSB outputs M
1
~M
15
. The output of each MSB current source
73
is connected to a switch
731
which is turned on or off by a corresponding MSB output M
1
~M
15
, such that the output current from each of the MSB current sources
73
is controlled to be selectively output by the corresponding MSB output M
1
~M
15
. Similarly, each of LSB current sources
74
corresponds to one of the LSB outputs L
1
~L
15
. The output of each LSB current source
74
is connected to a switch
741
which is turned on or off by a corresponding LSB output L
1
~L
15
, such that the output current from each of the LSB current sources
74
is controlled to be selectively output by the corresponding LSB output L
1
~L
15
. Accordingly, the digital input code I
0
~I
7
can be converted into a corresponding analog current I
out
for output.
Generally, one LSB current source
74
is implemented by a metal oxide semiconductor (MOS) transistor, and one MSB current source
73
is comprised of
16
MOS transistors for providing a larger output current. Therefore, the circuit layout of the current source transistors for the conventional D/A converter can be shown as in
FIG. 8
, wherein all the required transistors
81
are arranged in a 15×16 array. Each column of the array includes
16
transistors
81
electrically added together to form a MSB current source
73
, and fifteen transistors
81
in the rightmost column are provided to be the 15 LSB current sources
74
, respectively.
In such a circuit layout, the transistors of the MSB current sources
73
are sequentially arranged from left to right, which may result in producing gradients in the transistor values of the transistors due to process inaccuracies. Therefore, a known DNL (Differential Non-Linearity) error is likely to be caused by the gradients. Such a DNL error negatively affects the accuracy and performance of the DIA converter.
To avoid the above DNL error, U.S. Pat. No. 5,568,145 for a “Current Source Layout Technique to Minimize Deviation” granted to Reynolds is disclosed to have an array of current source cells, wherein the LSB current source cells are physically arranged centrally with respect to the MSB current source cells, and the cells of each MSB current source are electrically added together and physically located along a laterally diagonal path. Although such a circuit layout may eliminate the DNL error caused by the gradients, it is only suitable to an even-bit D/A converter because the number of all the LSB current sources has to be approximately equal the number of the cells of one MSB current source. In other words, it is not applicable to the odd-bit D/A converters, such as 9-bit D/A converters, which are commonly used in audio/video products. Furthermore, because the cells of each MSB current source are added and located in a laterally diagonal manner, the wire connection of the circuit layout is difficult and thus the layout area is increased.
Therefore, it is desired to have an improved layout arrangement of current cells in a D/A converter to overcome the aforementioned drawbacks.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a current-mode D/A converter, wherein its current source layout is applicable to a digital input with an odd number of bits.
It is another object of the present invention to provide a current-mode D/A converter, wherein its current source layout can eliminate errors caused by process inaccuracies.
It is still another object of the present invention to provide a currentmode D/A converter, wherein the wire connection of its current source layout is easy and the layout area is significantly decreased.
To achieve the above objects, a current-mode D/A converter having a plurality of large current sources and a plurality of small current sources is provided for converting a digital input into an analog current output. Each large current source has a plurality of unit current sources. The large current sources are divided into a plurality of groups, each having two large current sources, for being symmetrically arranged. The unit current sources of two large current sources in one group are interlacingly interposed. Each small current source has at least one unit current source and the unit current sources of the small current sources are diagonally inserted into the unit current sources of the large current sources.
The above and other objects, features and advantages of the present invention will become apparent from the following detailed description taken with the accompanying drawings.


REFERENCES:
patent: 5870049 (1999-02-01), Huang
patent: 6130632 (2000-10-01), Opris

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