Layered polymer on aluminum stacked capacitor

Details Layered polymer on aluminum stacked capacitor Layered polymer on aluminum stacked capacitor

2001-08-06

2003-07-08

Reichard, Dean A. (Department: 2831)

Electricity: electrical systems and devices

Electrolytic systems or devices

Solid electrolytic capacitor

C361S301400

Reexamination Certificate

active

06590762

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to electronic capacitors, and more specifically to foil stacked capacitors using aluminum and polymer.
BACKGROUND OF THE INVENTION
Electrical circuits often include capacitors for various purposes such as filtering, bypassing, power decoupling, and to perform other functions. High-speed digital integrated circuits such as processors and computer chipsets in particular typically perform best when the power supplied to the integrated circuit is filtered with a capacitor placed physically close to the integrated circuit.
Such power decoupling capacitors function to smooth out irregularities in the voltage supplied to the integrated circuits, and so serve to provide the integrated circuits with a more ideal voltage supply.
By placing the decoupling capacitors near the integrated circuit, parasitic impedances such as printed circuit board path resistance or inductance are minimized, allowing easy and efficient transfer of energy from the.decoupling capacitor to the integrated circuit. Minimization of series resistance and inductance in the capacitor itself is also desirable for the same purposes, and results in a more efficient and desirable decoupling or bypass capacitor.
The internal series resistance of the capacitor is typically known as the Equivalent Series Resistance, or ESR. Similarly, internal series inductance is known as Equivalent Series Inductance, or ESL. Both of these parameters can be measured for a given capacitor, and are among the basic criteria used to select capacitors for applications such as integrated circuit power supply decoupling.
Past efforts to minimize ESL and ESR have included solutions such as using multiple types of capacitors in parallel or combination series-parallel configurations, configured to product the desired capacitance at the very low ESR and ESL levels required. For example, tantalum capacitors in the order of 4.7 uF in parallel with 0.01 uF ceramic chip capacitors were often sufficient for lower-speed digital logic circuits of previous decades. But, new high speed digital logic circuits such as high-performance computer processors require both greater capacitance because of the amount of power dissipated, and lower ESR and ESL because of the very high speeds at which the processors operate.
It is also desirable for capacitors to have a physically small size, so that they do not take an unduly large amount of printed circuit board space. This is why space efficient capacitor technologies such as tantalum and electrolytic capacitors are often implemented in circuits despite typically having relatively high inductance, resistance, dielectric absorption, and other unfavorable characteristics. Mitigation of unfavorable capacitor characteristics of electrolytic or tantalum capacitors often also requires use of parallel capacitors with more favorable characteristics as secondary or supplemental decoupling capacitors.
What is desired is a single capacitor design that provides low ESR and ESL with large capacitance, and that is physically compact.


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