Layered circuit-board designing method and layered circuit-board

Details Layered circuit-board designing method and layered circuit-board Layered circuit-board designing method and layered circuit-board

1996-06-11

1998-06-16

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361778, 361790, 361791, 361792, 361802, 361803, 361809, 439 74, 439591, 439 44, 439 47, 439 50, 439 65, H05K 114

Patent

active

057681066

ABSTRACT:
A layered circuit-board designing method and layered circuit-board where circuit-boards to be overlaid are connected at the center or an arbitrary position of each circuit-board. The layered circuit-board includes an upper-layer first circuit-board, a lower-layer third circuit-board, and an intermediate-layer second circuit-board between the first and third circuit-boards. A first connector is mounted on the first circuit-board, a second connector is mounted on the third circuit-board, a third connector is mounted on the top surface of the second circuit-board, while maintaining the positional relation between the third connector and the first connector, and a fourth connector is mounted on the bottom surface of the second circuit-board, while maintaining the positional relation between the fourth connector and the second connector. In addition, through holes are provided at pins of the third and fourth connectors for passing through the front and bottom surfaces of the second circuit-board.

REFERENCES:
patent: 4133592 (1979-01-01), Cobaugh et al.
patent: 4134631 (1979-01-01), Conrad et al.
patent: 4929185 (1990-05-01), Wong et al.
patent: 5176526 (1993-01-01), Hillbish et al.

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