Plastic and nonmetallic article shaping or treating: processes – Stereolithographic shaping from liquid precursor
Reexamination Certificate
2000-08-29
2003-08-19
Tentoni, Leo B. (Department: 1732)
Plastic and nonmetallic article shaping or treating: processes
Stereolithographic shaping from liquid precursor
C264S040100, C264S409000, C425S135000, C425S174400, C425S375000
Reexamination Certificate
active
06607689
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to stereolithography and, more specifically, to an apparatus and method of controlling the thickness of layers of stereolithographic materials forming a layered object utilizing variable elevation of the surface of a liquid material from which such layers are formed.
2. State of the Art
In the past decade, a manufacturing technique termed “stereolithography,” also known as “layered manufacturing,” has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced, involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or “sliced” into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and non-metallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a semisolid state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated, fixed or cured, or a separate binder material may be employed to bond material particles to one another and to those of a previously-formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next-lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, resolution is highly dependent upon the minimum surface area of the liquid which can be fixed (cured) and the minimum thickness of a layer which can be generated given the viscosity of the liquid and other parameters such as transparency to radiation or particle bombardment used to effect at least a partial cure of the liquid to a structurally stable state. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.
An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files. Thus, either male or female forms on which mold material might be disposed might be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design was committed to large-scale production.
Stereolithography has also been employed to develop and refine object designs in relatively inexpensive materials, and has also been used to fabricate small quantities of objects where the cost of conventional fabrication techniques is prohibitive for same, such as in the case of plastic objects conventionally formed by injection molding. It is also known to employ stereolithography in the custom fabrication of products generally built in small quantities or where a product design is rendered only once. Finally, it has been appreciated in some industries that stereolithography provides a capability to fabricate products, such as those including closed interior chambers or convoluted passageways, which cannot be fabricated satisfactorily using conventional manufacturing techniques.
More recently, stereolithography has been used to apply material to preformed electronic components and resulting structures with a high degree of precision. For example, stereolithographic techniques may be used to apply protective or alignment structures to substrates. A substrate used for effecting electrical testing of semiconductor devices or to connect same to each other or to higher-level packaging may be provided with a protective structure in the form of a layer of dielectric material having a controlled thickness or depth and defining precisely sized, shaped and located apertures through which conductive terminals on the surface of the substrate may be accessed for testing of a semiconductor die disposed on the substrate.
The dielectric layer, in addition to physically protecting, sealing and isolating circuit traces on the substrate from connective elements on the superimposed semiconductor die to prevent shorting, may be employed as desired as a structure to mechanically align the die with the substrate for proper communication of the connective elements with the substrate terminals. This may be effected in the context of a so-called “flip chip” semiconductor die bearing a pattern of connective elements projecting from the active surface of the die (such as solder bumps or conductive or conductor-bearing polymers), by using precisely sized and located apertures in the dielectric material to partially receive the connective elements. In addition to, or in lieu of, such an alignment structure approach, upwardly-projecting alignment elements comprising the same material as that of the dielectric layer may be fabricated on the dielectric layer. Such alignment elements may, for example, comprise C-shaped projections located on opposing sides of an intended-location for the semiconductor die, L-shaped projections at corners of the intended die location, or linear segments parallel to, and defining a slightly larger area than, the side of a rectangular die. A more detailed disclosure of the foregoing may be found in copending U.S. patent application Ser. No. 09/259,143, filed Feb. 26, 1999, assigned to the assignee of the present invention and the disclosure of which application is hereby incorporated herein by reference.
In addition, it has also been proposed to employ stereolithography to form packaging and other protective structures for semiconductor dice and lead frames, wire bonds and other associated structures, and to employ stereolithograhic apparatus in combination with so-called “machine vision” systems to avoid the necessity of precisely positioning or aligning preformed structures for application of materials thereto using stereolithography. A more detailed disclosure of the foregoing may be found in copending U.S. patent application Ser. No. 09/259,142, filed Feb. 26, 1999, assigned to the assignee of the present invention and the disclosure of which application is hereby incorporated herein by reference.
All such layered structures may be formed using stereolithographic techniques. Formation of these structures is accomplished by susp
Micro)n Technology, Inc.
Tentoni Leo B.
TraskBritt
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