Laterally marching interconnecting lines in semiconductor interg

Details Laterally marching interconnecting lines in semiconductor interg Laterally marching interconnecting lines in semiconductor interg

1988-01-29

1990-04-03

Clawson, Jr., Joseph E.

357 236, 357 45, H01L 2348

Patent

active

049145029

ABSTRACT:
In order to reduce parasitic capacitive cross-coupling in an integrated circuit, metallization lines in an array--for example, an array of word lines, of bit lines, or of bus interconnects--are geometrically arranged in a systematically progressive laterally (sidewise) marching sequence, whereby the identity of the lines located on either side of a given line keeps changing.

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