Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1983-12-05
1986-04-29
Hearn, Brian E.
Metal working
Method of mechanical manufacture
Assembling or joining
29576W, 29578, 29580, 29571, 148187, 357 35, 357 50, H01L 21265, H01L 21302
Patent
active
045847622
ABSTRACT:
The invention is a transistor or array thereof and method for producing same in VLSI dimensions on a silicon substrate doped P or N type by forming intersecting slots in spaced apart relation across the substrate to define semiarrays of V shaped intermediate regions which will become transistors. Silicon oxide fills these slots and separates the transistor regions from the substrate. Orthogonal slots divided the semiarrays into individual transistor active regions which are doped by one of N or P doping introduced into each active regions via the orthogonal slots and driven in to comprise the emitter and collector regions on respective sides of original substrate comprising the base regions. Metallization patterns complete electrical connections to the emitter base and collector regions and silicon oxide substantially covers the periphery of each active region for total isolation. Each transistor may further comprise a doped region called P or N doping extending into and across the top of the base region underneath the metallization to reduce space region contact resistance and to provide an electron reflecting potential barrier. Each transistor may further comprise a doped skin of either P or N doping to force electrons toward the center of the base region.
REFERENCES:
patent: 4232439 (1980-11-01), Shibata
patent: 4264382 (1981-04-01), Anantha et al.
patent: 4335503 (1982-06-01), Evans et al.
patent: 4435899 (1984-05-01), Soclof
Caldwell Wilfred G.
Hamann H. Fredrick
Hearn Brian E.
Hey David A.
Rockwell International Corporation
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