Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2001-03-23
2002-09-03
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S335000, C257S336000, C257S339000
Reexamination Certificate
active
06445019
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a semiconductor device, in particular a lateral semiconductor device that is capable of withstanding high reverse biasing voltages.
BACKGROUND OF THE INVENTION
It is well known in the semiconductor art that the spread of the depletion region of a reverse-biased rectifying junction (and so the breakdown voltage of that junction) can be increased by reducing the dopant concentration and increasing the size of a semiconductor region associated with the rectifying junction. However, although this enables the reverse breakdown voltage to be increased, it also increases the resistivity and length of the current path through the device when the rectifying junction is forward biased. The series resistivity of the current path for majority charge carriers through the device increases in proportion to approximately the square of the desired reverse breakdown voltage, so limiting the current handling capability of the device for a given maximum thermal dissipation.
U.S. Pat. No. 4.754,310 (our reference PHB32740) addresses this problem by providing one of the regions forming the rectifying junction as a voltage-sustaining zone formed of first regions of one conductivity type interposed with second regions of the opposite conductivity type with the dopant concentrations and dimensions of the first and second regions being such that, when the rectifying junction is reverse biased in operation and the voltage-sustaining zone is depleted of free charge carriers, the space charge per unit area in the first and second regions balances at least to the extent that the electric field resulting from the space charge is less than a critical field strength at which avalanche breakdown will occur. This enables the required reverse breakdown voltage characteristics to be obtained using interposed semiconductor regions which individually have a higher dopant concentration, and thus lower resistivity, than would otherwise be required so that the series resistivity of the first and second regions and thus the on-resistance of the device can be lower than for a conventional device. U.S. Pat. No. 4,754,310 does, however, require good control over the dopant concentrations and thicknesses of the interposed layers in order to achieve the required space charge balancing.
SUMMARY OF THE INVENTION
It is an aim of the present invention to provide another way of improving the trade-off between breakdown voltage and on-resistance in a lateral high voltage semiconductor device that does not require precise charge balancing.
In one aspect, the present invention provides a semiconductor device as set out in claim
1
.
According to one aspect of the present invention, there is provided a lateral semiconductor device wherein a voltage-sustaining zone is provided between first and second main regions of the semiconductor device, the semiconductor device further comprising means for adjusting the voltage profile within the voltage-sustaining zone between the first and second main regions So as to increase the reverse breakdown voltage that can be achieved by the device for a given dopant concentration and length of the voltage-sustaining zone between the first and second main regions, the voltage profile adjusting means comprising a plurality of electrically conductive regions disposed within and insulated from the voltage-sustaining zone so as to be spaced-apart at least in the direction between the first and second main regions and means for setting or regulating the voltage at each electrically conductive region so that, when a reverse biasing voltage is applied between the first and second main regions, each electrically conductive region acts to set or fix the voltage at its location in the voltage-sustaining zone.
In a device embodying the invention, the electrical potential in a direction between the first and second main regions can be controlled so as to increase linearly from the first main region to the second main region to deplete the voltage-sustaining zone, so enabling the length of the voltage-sustaining zone to be significantly reduced and the dopant concentration of the voltage-sustaining zone to be increased relative to a conventional device having the same structure but without the voltage profile adjusting means. Because the dopant concentration of the voltage-sustaining zone can be increased, the resistivity of the current path between the first and second main regions while the device is conducting is also reduced relative to a conventional device.
The voltage regulating means or regulator may comprise a voltage regulating region electrically coupled to at least one of the first and second main regions with the electrically conductive regions being coupled to spaced apart locations along the voltage regulating region. In a preferred arrangement, the voltage regulating region is electrically coupled between the first and second main regions.
The voltage regulating region may comprise a bleed layer, for example a layer of oxygen doped polycrystalline silicon. As another possibility, the voltage regulating region may comprise a semiconductor region such that, when the semiconductor region and the voltage-sustaining zone are depleted of free charge carriers in a mode of operation of the device, the space charge in the semiconductor region substantially balances with the space charge in the voltage-sustaining zone. As yet another possibility, the voltage regulating region may comprise a semiconductor structure consisting of first regions of one conductivity type interposed with second regions of the opposite conductivity type such that, when the first and second regions are depleted of free charge carriers in a mode of operation of the device, the space charge of the first and second regions substantially balances.
The electrically conductive regions may be formed of any suitable low resistance material such as a metal or highly doped semiconductor.
An embodiment of the present invention enables a lateral semiconductor device to be provided that enables the trade-off between reverse breakdown voltage and on-resistance to be improved in a manner different from that proposed in U.S. Pat. No. 4,754,310 and which avoids the need for precise charge balancing between opposite conductivity type regions in the voltage-sustaining zone.
It should be noted that WO 99/35695 proposes a silicon on insulator (SOI) high voltage insulated gate field effect device in which the voltage-sustaining zone or drain drift region of a lateral insulated gate field effect transistor is formed with a grid-like arrangement of columnar grooves filled with semiconductor material of the opposite conductivity type to the drain drift region. In this arrangement, the opposite conductivity type pillars in the columnar grooves are floating, that is they are not connected to either the source or drain electrode, and a linear voltage profile is achieved within the voltage-sustaining zone through impact-ionization related small leakage currents so that the arrangement is self-regulating. WO 99/35695 does not require precise space charge balancing because the opposite conductivity type regions within the drain drift region are floating. However, in the device of WO 99/35695 the electric field at one side of the pillars must be zero otherwise that pn junction between the pillar and the drain drift region would be forward-biased and a current would exist that could not be supported. This may limit potential gain in specific Rdson. Also, the presence of so many opposite conductivity type regions in the drain drift region. in the device described in WO 99/35695 may cause charge storage problems and parasitic bipolar transistor or thyristor action.
In contrast to WO 99/35695, the present invention does not require that the material in the openings or grooves be opposite conductivity type semiconductor material so that the above described problems resulting from the use of opposite conductivity type material need not occur. Indeed the present invention enables any low electrical resistance material to
Biren Steven R.
Koninklijke Philips Electronics , N.V.
Nelms David
Tran Mai-Huong
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