Lateral overflow drain, anti-blooming structure for CCD...

Details Lateral overflow drain, anti-blooming structure for CCD... Lateral overflow drain, anti-blooming structure for CCD...

2001-08-31

2003-09-23

Tran, Minh Loan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Charge transfer device

C257S290000, C257S291000

Reexamination Certificate

active

06624453

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to the field of image sensors and, more particularly, to such image sensors having a lateral overflow drain substantially underneath a thick field dielectric.
BACKGROUND OF THE INVENTION
In full frame type, charge-coupled device (CCD) image sensors, lateral overflow drain (LOD) structures are formed along with vertical CCD shift registers to provide means for conducting excess electrical charges away from the imaging area. Such removal is necessary to prevent the image defect known as blooming in the CCD pixels, in which the column becomes either partially or completely flooded with charge thereby destroying the intended image. Referring to
FIG. 1
, an illustration of a conventional lateral overflow drain structure is shown drawn at the center of two adjacent columns. To form the LOD, an implant consisting of n-type impurities is made through the thin gate dielectric at the edge of the device active area and is aligned to a region of thick field oxidation that has been grown to provide electrical isolation between the vertical CCD columns of the imaging area. Electrical isolation is also provided by a p-type implant made under the field oxidation. Upon illumination of the array, photogenerated electrical charge is collected in the implanted n-type buried channel regions. To prevent blooming at high illumination levels, a region of the buried channel is compensated with p-type impurities to form an electrostatic potential barrier to the LOD. Thus, excess electrical charges, that would normally overfill the buried channel regions and bloom up and down the columns, instead find an outlet over the LOD barrier into the n-type LOD drain where they can be safely conducted away from the imaging area. A plot of the electrostatic potential, or channel potential, versus position for the structure under typical operational condition appears in FIG.
3
.
In order to provide a sufficient level of conductivity to handle the large amounts of overflow current typically required for high-performance imaging applications, it is usually necessary to introduce a large dose of n-type impurities to form the LOD. However, it is found from numerical simulation of the device shown in
FIG. 1
that a practical limitation on the amount of n-type impurities that can be implanted (and therefore an upper bound on the lateral overflow drain conductivity) is reached when the electrical fields produced at the silicon surface become high enough to cause electrical breakdown of the LOD via the impact ionization mechanism (also known as avalanche breakdown) or via quantum mechanical band-to-band tunneling. In simple terms, electrical breakdown results in the generation of undesirably large electric currents. The breakdown condition ordinarily is produced as the applied bias on the device electrodes is increased. It should be evident to those skilled in the art that the conditions for avalanche breakdown are most severe for the accumulation mode of operation, where the gate electrodes are typically placed at −10 volts. Because the lateral overflow drain is usually biased at 10 volts, a total of 20 volts is placed across the thin gate dielectric, with the highest electric field occurring at the silicon surface above the center of the lateral overflow drain implant. A representative plot of the surface electric field strength versus position of
FIG. 1
is shown in FIG.
2
.
Consequently, a need exists for a CCD LOD anti-blooming structure with a breakdown voltage much higher than the surface limit such that increases in the LOD dose provide improvements in conductivity and the amount of blooming protection.
SUMMARY OF THE INVENTION
The present invention is directed to overcoming one or more of the problems set forth above. Briefly summarized, according to one aspect of the present invention, the invention resides in an image sensor having an anti-blooming structure, where the image sensor comprises (a) a substrate of a first conductivity type; (b) a dielectric having a first thin portion and a second thick portion; (c) a buried channel of the second conductivity type within the substrate substantially spanning the first thin portion; and (d) a lateral overflow drain region of the second conductivity type disposed substantially in its entirety spanning a portion of the second thick portion for collecting excess photogenerated charges for preventing blooming.
These and other aspects, objects, features and advantages of the present invention will be more clearly understood and appreciated from a review of the following detailed description of the preferred embodiments and appended claims, and by reference to the accompanying drawings.
ADVANTAGEOUS EFFECT OF THE INVENTION
The present invention has the advantage of placing the lateral overflow drain underneath a thick dielectric layer so that a substantially lower electric field results at the silicon surface which permits a greater amount of n-type impurities to be used for providing enhanced conductance.


REFERENCES:
patent: 4774557 (1988-09-01), Kosonocky
patent: 2002/0149078 (2002-10-01), Hynecek

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