Lateral metal-oxide-semiconductor controlled triacs

Details Lateral metal-oxide-semiconductor controlled triacs Lateral metal-oxide-semiconductor controlled triacs

1987-08-24

1989-08-15

Clawson, Jr., Joseph E.

357 238, 357 2314, 357 39, 357 55, 357 86, H01L 2978

Patent

active

048579777

ABSTRACT:
Lateral MOS controlled gate turn-off triacs with large OFF-Gate-width to emitter-width ratios. In one embodiment an ON channel is provided at one main electrode and an OFF channel is provided at the other. In another embodiment two channels in a series are provided at each main electrode. Current turn-off capacity is increased by serpentine or comb shaped channel regions or by trenches which provide channels along their walls.

REFERENCES:
patent: 4199774 (1980-04-01), Plummer
patent: 4574207 (1986-03-01), Benjamin et al.
patent: 4577208 (1986-03-01), Schuttene et al.
patent: 4612465 (1986-09-01), Schutten et al.
patent: 4622569 (1986-11-01), Lade et al.
patent: 4672407 (1987-06-01), Nakagawa et al.
patent: 4717940 (1988-01-01), Shinohe et al.
"Insulated Gate Planar Thyristors: I-Structure and Basic Operation" by Plummer, IEEE Transactions on Electron Devices, vol. Ed-27, No. 2, Feb. 1980, pp. 380-386.
"Insulated Gate Planar Thyristors: II-Quantitative Modeling" by B. W. Scharf and J. D. Plummer, IEEE Transactions on Electron Devices, vol. ED-27, No. 2, Feb. 1980-pp. 387-393.

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