Lateral junction varactor with large tuning range

Details Lateral junction varactor with large tuning range Lateral junction varactor with large tuning range

2007-09-20

2010-06-22

Tran, Long K (Department: 2818)

Semiconductor device manufacturing: process

Voltage variable capacitance device manufacture

C438S328000, C438S329000, C438S330000, C257SE27049, C257SE29344

Reexamination Certificate

active

07741187

ABSTRACT:
Large tuning range junction varactor includes first and second junction capacitors coupled in parallel between first and second varactor terminals. First and second plates of the capacitors are formed by three alternating doped regions in a substrate. The second and third doped regions are of the same type sandwiching the first doped region of the second type. A first varactor terminal is coupled to the second and third doped regions and a second varactor terminal is coupled to the first doped region. At the interfaces of the doped regions are first and second depletion regions, the widths of which can be varied by varying the voltage across the terminals from zero to full reverse bias. At zero bias condition, junction capacitance (Cmax) is enhanced due to summation of two junction capacitances in parallel. At reverse bias condition, with the merging of the two junction depletion widths, the capacitor areas are drastically reduced, thereby reducing Cminsignificantly. Thus, tuning range Cmax/Cminis significantly increased. Tuning range with this configuration can be increased infinitely by increasing the horizontal lengths of the second and third diffusion regions.

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H.S. Bennett et al., Device and Technology Evolution for Si-based RF integrated circuits, IEEE Transactions on Electron Devices, Jul. 2005 pp. 1235-1258, vol. 52, Issue 7.

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