Lateral junction field-effect transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

Reexamination Certificate

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Details

C257S286000, C257S285000, C257S266000, C257S268000

Reexamination Certificate

active

07023033

ABSTRACT:
A lateral JFET has a basic structure including an n-type semiconductor layer (3) formed of an n-type impurity region and a p-type semiconductor layer formed of a p-type impurity region on the n-type semiconductor layer (3). Moreover, in the p-type semiconductor layer, there are provided a p+-type gate region layer (7) extending into the n-type semiconductor layer (3) and containing p-type impurities of an impurity concentration higher than that of the n-type semiconductor layer (3) and an n+-type drain region layer (9) spaced from the p+-type gate region layer (7) by a predetermined distance and containing n-type impurities of an impurity concentration higher than that of the n-type semiconductor layer (3). With this structure, the lateral JFET can be provided that has an ON resistance further decreased while maintaining a high breakdown voltage performance.

REFERENCES:
patent: 4185291 (1980-01-01), Hirao et al.
patent: 4485392 (1984-11-01), Singer
patent: 4876579 (1989-10-01), Davis et al.
patent: 5264713 (1993-11-01), Palmour
patent: 5319227 (1994-06-01), Lapham et al.
patent: 5378642 (1995-01-01), Brown et al.
patent: 6285046 (2001-09-01), Kaminski et al.
patent: 19844531 (2000-04-01), None
patent: 06084948 (1994-03-01), None
patent: 07030111 (1995-01-01), None

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