Lateral extension stacked capacitor

Details Lateral extension stacked capacitor Lateral extension stacked capacitor

1991-11-26

1993-08-17

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 47, 437 60, 437233, H01L 2170, H01L 2700

Patent

active

052368602

ABSTRACT:
A lateral extension stacked capacitor (LESC) using a modified stacked capacitor storage cell fabrication process. The LESC is made up of polysilicon structure, having a spherical ended v-shaped cross-section. The storage node plate of the LESC is overlaid by polysilicon with a dielectric sandwiched in between and connects to an access device's active area via a buried contact. The plate extends to an adjacent storage node but is isolated from the adjacent node by less than the critical resolution dimension of a given lithographic technology. The addition of the polysilicon structure increases storage capability 50% without enlarging the surface area defined for a normal buried digit line stacked capacitor cell.

REFERENCES:
patent: 4742018 (1988-05-01), Kimura et al.
patent: 5049517 (1991-09-01), Liu et al.
patent: 5071781 (1991-12-01), Slo et al.
patent: 5100825 (1992-03-01), Fatan et al.
patent: 5118640 (1992-06-01), Fujii et al.
"3-Dimensional Stacked Capacitor Cell For 16M and 64M DRAMs" by T. Ema et al., IEDM 88, pp. 592-595 (1988).
"A Spread Stacked Capacitor (SCC) for 64BIT DRAMs" by S. Inoue et al., IEEE 89, pp. 2.3.1-2.3.4 (1989).

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