Lateral drift vertical metal-insulator semiconductor field...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

Reexamination Certificate

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C257S329000

Reexamination Certificate

active

07019344

ABSTRACT:
A lateral drift vertical metal-insulated field effect transistor (LDVMISFET) with an optimum conducting channel formed in Silicon Carbide, is provided as a power transistor with a voltage rating of greater than 200 V. The lateral drift region achieves a better on-resistance/breakdown voltage trade-off than the conventional vertical drift region design of power MOSFETs. This is achieved by using an optimal doping and thickness for the voltage blocking and current conduction. The drain and backside terminal is able to support at least the rated blocking voltage of the device. A vertical MIS channel may be formed on the favorable 11-20 plane to achieve a higher MIS channel mobility as compared to the conventional 0001 or 000-1 planes resulting in a much lower on-resistance for the same blocking voltage as compared to conventional vertical MOSFET with similar blocking voltage.

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