Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With base region having specified doping concentration...
Reexamination Certificate
2000-12-20
2002-12-03
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With base region having specified doping concentration...
C257S574000, C257S575000
Reexamination Certificate
active
06489665
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to semiconductor technology, and in particular to a lateral bipolar transistor and the process for making same.
BACKGROUND OF THE INVENTION
Recently respectable bipolar transistors have been formed using a CMOS (complementary metal-oxide semiconductor) transistor in a typical CMOS process. These bipolar transistors are also referred to as lateral bipolar transistors and are reported to have a threshold frequency (t) as high as 3.7 Ghz and a Beta as high as 1000. This alternate method of forming a bipolar transistor has some strong advantages. The process is extremely simple compared to a typical BiCMOS process that uses complicated and expensive process flows costing 30-40% more than a typical CMOS flow. The use of a CMOS flow to create a lateral bipolar transistor adds negligible cost to a current CMOS process and provides a capable bipolar transistor.
The lateral bipolar transistor is fabricated using a typical lightly doped drain (LDD) MOS transistor. An NPN device is formed from an NMOS transistor and a PNP device is formed from a PMOS transistor. The base width of the lateral bipolar transistor is determined by and is usually equal to the MOS channel length. As MOS devices have shrunk the channel lengths have approached the base width of a bipolar making the lateral bipolar transistor possible.
In one variation a base implant is added to the process steps to balance the bipolar and MOS modes of operation. In addition the typical lateral bipolar transistor employs a base-gate contact for providing an electrical connection between the base and gate of the lateral bipolar transistors. Since the base is typically fabricated in the well, the gate depletes the base while the substrate contact controls the base voltage.
The Inventors have discovered that the lateral bipolar transistors, fabricated according to the structures described above, have a reduction in gain at high currents or at high bias voltages. Thus, it would be desirable to have a CMOS-based bipolar transistor having improved bipolar performance during high current or high bias voltage conditions.
SUMMARY OF THE INVENTION
One exemplary embodiment of the invention is a substantially concentric lateral bipolar transistor and the method of forming same. The lateral bipolar transistor includes a base region disposed about a periphery of an emitter region and a collector region disposed about a periphery of the base region. A gate overlies the substrate and at least a portion of the base region. At least one electrical contact is formed connecting the base and the gate, although a plurality of contacts may be formed. The invention includes a metal oxide semiconductor inversion region formed in the substrate and a retrograde well formed below the inversion region.
In a further exemplary embodiment a bipolar transistor is formed according to the following method. A base region is formed in a substrate and a gate region is formed overlying at least a portion of the base region. Emitter and collector terminals are formed on opposed sides of the base region. The gate is used as a mask during first and second ion implants. During the first ion implant the ions bombard the substrate from a first direction to grade a base/emitter junction, and during the second ion implant ions bombard the substrate from a second direction to grade a base/collector junction.
In a further exemplary embodiment the invention is a lateral bipolar transistor having a decreased base width. The decreased base region is created by implanting ions after fabrication of collector and emitter regions to enlarge the collector and emitter regions, thereby decreasing the base region and increasing gain.
REFERENCES:
patent: 4152627 (1979-05-01), Priel et al.
patent: 4485393 (1984-11-01), Kumamaru et al.
patent: 4583106 (1986-04-01), Anantha et al.
patent: 4956305 (1990-09-01), Arndt
patent: 4987089 (1991-01-01), Roberts
patent: 5049966 (1991-09-01), Wald
patent: 5218228 (1993-06-01), Williams et al.
patent: 5326710 (1994-07-01), Joyce et al.
patent: 5358884 (1994-10-01), Violette
patent: 5498885 (1996-03-01), Deen et al.
patent: 5574306 (1996-11-01), Wang et al.
patent: 5605849 (1997-02-01), Chen et al.
patent: 5608236 (1997-03-01), Arakawa et al.
patent: 5666001 (1997-09-01), Miwa
patent: 5717241 (1998-02-01), Malhi et al.
patent: 5827774 (1998-10-01), Kitajima et al.
patent: 5828124 (1998-10-01), Villa
patent: 5910676 (1999-06-01), Prengle et al.
patent: 5965923 (1999-10-01), Prall et al.
patent: 6137146 (2000-10-01), Manning
patent: 5773964 (1982-05-01), None
patent: 5850772 (1983-03-01), None
patent: 2294063 (1990-12-01), None
Akiyama, N., et al., “CMOS-Compatible Lateral Bipolar Transistor for BiCMOS Technology: Part I—Modeling”,IEEE Trans. on Electron Devices, 39, 948-951, (Apr. 1992).
Grove, A.,Physics and Technology of Semiconductor Devices, John Wiley & Sons, Pubs., New York, book cover, copyright information and p. 323 cited., 3 pages, (1967).
Hayden, J., et al., “A High-Performance 0.5-um BiCMOS Technology for Fast 4-Mb SRAM's”,IEEE Trans. on Electron Devices, 39, 1669-1679, (Jul. 1992).
Tamba, A., et al., “CMOS-Compatible Lateral Bipolar Transistor for BiCMOS Technology: Part II—Experimental Results”,IEEE Trans. on Electron Devices, 39, 1865-1869, (Aug., 1992).
Verdonckt-Vanderbrok, S., et al., “High Gain Lateral Bipolar Transistor”,Int. Electron Devices Meeting: Technical Digest, San Francisco, CA, 406-409, (Dec. 1988).
Verdonckt-Vanderbrok, S., et al., “High-Gain Lateral Bipolar Action in a MOSFET Structure”,IEEE Trans. on Electron Devices, 38, 2487-2496, (Nov. 1991).
Verdonckt-Vanderbrok, S., et al., “High-Gain Lateral p-n-p Bipolar Action in a p-MOSFET Structure”,IEEE Electron Device Lett., 13, 312-313, (Jun. 1992).
Prall Kirk D.
Violette Mike P.
Schwegman Lundberg Woessner & Kluth P.A.
Wilson Allan R.
LandOfFree
Lateral bipolar transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Lateral bipolar transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lateral bipolar transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2983885