Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Lateral bipolar transistor structure
Reexamination Certificate
2000-08-22
2002-04-02
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Lateral bipolar transistor structure
C257S511000, C257S512000, C257S517000, C257S557000, C257S560000, C257S561000, C257S593000
Reexamination Certificate
active
06365957
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a bipolar transistor and more particularly to a lateral bipolar transistor that are used in bi-CMOS or CMOS integrated circuits.
A lateral bipolar transistor have less steps and lower costs in its manufacturing process than a vertical bipolar transistor that are used in analog circuits and therefore, are used as power circuits and high-frequency amplifying devices in bi-CMOS or CMOS integrated circuits.
The structure of a conventional lateral bipolar transistor is shown in FIG.
1
. FIG.
1
(A) is a plan view and FIG.
1
(B) is a sectional view along a dotted chain line A-A′ shown in FIG.
1
(A). Here, a PNP transistor is shown as an example.
On a P-type semiconductor substrate
11
, a square device area
13
and a rectangular base contact area
14
are formed which are surrounded by an isolating insulation layer
12
formed at a specified depth from a surface of the semiconductor substrate
11
. In the device area
13
and the base contact area
14
, an N-type base area
15
is formed on the entire areas. The base area
15
is formed to a depth deeper than the thickness of the insulation layer
12
from the surface of semiconductor substrate
11
and its lower end is turned over to the bottom surface of the insulation layer
12
, forming one well area as a whole as shown in FIG.
1
(B).
Next, on the central portion of the device area
13
, a square P-type emitter area
16
is formed as shown in FIG.
1
(A). This emitter area is formed in a depth shallower than the thickness of the insulation layer
12
from the surface of the semiconductor substrate
11
as shown in FIG.
1
(B). Accordingly, the P-type emitter area
16
is formed in the N-type base area
15
. Further, in the device area
13
around the emitter area
16
, a P-type collector area
17
is formed with a specified space from the emitter area
16
. The collector area
17
is formed with the same thickness as the emitter area
16
in the N-type base area
15
.
On the surface of the semiconductor substrate
11
where the base area
15
, the emitter area
16
and the collector area
17
are thus formed, an oxide film
18
is formed for protecting the surface. Contact holes are formed on an oxide film
18
through which base electrodes
19
, an emitter electrode
20
and collector electrodes
21
are formed.
The operation of a conventional lateral PNP transistor in this structure will be explained.
Carriers injected from the emitter area
16
into the base area
15
is diffused in the base area
15
and reaches the collector area
17
. An emitter-base junction surface is formed by a side surface and a bottom surface of the emitter area
16
. The operation of a lateral PNP transistor is primarily contributed by an side area facing the collector area
17
. In other words, a current value I injected from the emitter is a sum of a current value IL flowing from the side surface of the emitter area
16
to the collector area
17
and a current value IV that is diffused in the base area
15
from the bottom of the emitter area
16
and flowing into the base electrode
19
. However, the current attributing to the operation of the transistor is mainly the lateral component IL since the current value IV becomes a base current by being recombined in the base area
15
.
To increase a current amplification factor h
FE
of a lateral transistor, it is enough to make the bottom area of the emitter area
16
small so as to reduce a current value IV flowing into the base electrode
19
diffusing in the base area
15
from the bottom of the emitter area, which hardly contributes to the operation of the transistor. However, when the bottom area of the emitter area
16
is reduced, a peripheral length as well as the side area of the emitter area
16
is also reduced. Therefore, even the current amplification factor itself can be promoted, an absolute value of the current value IL flowing from the emitter area
16
to the collector area
17
also decreases.
Suppose, for instance, the size of the emitter area
16
is about 3 &mgr;m
2
and a current amplification factor h
FE
is
100
, only 1~10 &mgr;A of collector current is obtained. Thus, the decrease of an absolute value of collector current of a transistor generates such a problem that sufficient current capacity is not obtained when a transistor is used in a power circuit and thus a power circuit having a sufficient load driving capacity is not obtained.
Further, when a lateral transistor is used as a high frequency amplifying device, cut-off frequency f
T
is desired to be high. By the way, one of factors deciding cut-off frequency f
T
of a transistor as a high-frequency amplifying device is the junction parasitic capacity. The bottom portion of the emitter area
16
of a lateral transistor contributes little to the transistor operation and operates to lower the cut-off frequency due to a parasitic capacity between the emitter/base junction. While in a vertical transistor, cut-off frequency of as high as 10~30 GH has been realized at present, in a lateral transistor, only about 200 MHz at the utmost has been realized.
Thus, the load driving capacity and the cut-off frequency of the lateral transistor are in a trade-off relation. That is, when the emitter area is made large in order to supply with a large current, the cut-off frequency drops because of the increased parasitic capacity. In a simple approximation, when the bottom area of the emitter area is increased to two time, the parasitic capacity of the emitter/base junction becomes four times.
Accordingly, an object of the present invention is to provide a lateral transistor with an improved load driving capacity and a cut-off frequency.
Further, another object of the present invention is to provide a lateral transistor with an improved current amplification factor and cut-off frequency in the state where the sufficient load driving capacity is maintained.
In addition, a further object of the present invention is to achieve the above-mentioned objects with a high degree of integration and a cheap manufacturing cost.
SUMMARY OF THE INVENTION
A lateral bipolar transistor according to the present invention comprises a device area formed on a semiconductor substrate being surrounded by an isolating insulation layer , a base area formed in the device area having a specified depth from the surface of the semiconductor substrate, a core insulation layer formed in the base area in a depth from the surface of the semiconductor substrate shallower than the base area, an emitter area formed around the core insulation layer in the depth shallower than the core insulation layer, and a collector area formed in the base area at a specified distance from the emitter area in a depth shallower than the core insulation layer.
Further, in the lateral bipolar transistor according to the present invention, a bottom area of the emitter area is reduced to be less than its side area by providing the core insulation layer.
Further, in the lateral bipolar transistor according to the present invention, the emitter area is provided at a nearly center of the device area spaced from the isolating insulation layer
Further, in the lateral bipolar transistor according to the present invention, on the surface of the semiconductor substrate including the emitter area formed around the core insulation layer, a surface protection film is laminated, and a contact hole is formed on the surface protection film to expose the emitter area formed around the core insulation layer so as to provide an emitter electrode in contact with the emitter area through the contact hole.
Further, in the lateral bipolar transistor of the present invention, the base contact area surrounded by the isolating insulation layer is formed on the surface of the semiconductor substrate beside the device area, and the base area is extending into the base contact area via a lower portion of the isolating insulation layer
Further, in the lateral bipolar transistor of the present invention, the collector area is provided at the periph
Flynn Nathan
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Sefer Ahmed N.
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