Latchup-preventing CMOS device

Details Latchup-preventing CMOS device Latchup-preventing CMOS device

1986-04-21

1987-03-03

Edlow, Martin H.

357 55, 357 59, 357 60, 357 238, H01L 2702, H01L 2906

Patent

active

046479570

ABSTRACT:
A new CMOS device which avoids latchup while achieving a spacing between the n-channel and p-channel FETs of the device smaller than 10 .mu.m, as well as a method for fabricating the choice, is disclosed. The inventive device, which is formed in a substrate comprising a relatively heavily doped bulk region supporting a relatively thin, moderately doped layer, includes a polysilicon-filled trench extending through a portion of the layer, between the n- and p-channel FETs of the device. The inventive device also includes a relatively heavily doped region extending from a bottom of the trench to the bulk region. The polysilicon-filled trench, in combination with both the relatively heavily doped region and bulk region, prevents latchup.

REFERENCES:
patent: 4231057 (1980-10-01), Momma et al.
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T. Fukushima et al., "A High Speed Schottky 4k-Bit PROM Using Diffused Eutectic Aluminum Process (Deap)," Proceedings of the 11th Conference (1979 International) on Solid State Devices, Tokyo, 1979; Japanese Journal of Applied Physics, vol. 19 (1980) Supplement 19-1, pp. 175-180.
S. Y. Chiang et al, "Trench Isolation Technology for MOS Applications," Journal of the Electrochemical Society, Aug. 1982, vol. 129, No. 8, p. 327C, Abstract 174 (abstract for the Fall Meeting of the Electrochemical Society held Oct. 17-21, 1982, in Detroit, Mich.
S. Y. Chiang et al, "Trench Isolation Technology for MOS Applications," The Electrochemical Society Extended Abstracts, vol. 82-2, Abstract No. 174 (extended abstract for the Fall Meeting of the Electrochemical Society held Oct. 17-21, 1982 in Detroit, Mich.
S. Y. Chiang et al, "Trench Isolation Technology for MOS Applicatons," Proceedings of the First International Symposium of VLSI Science and Technology, vol. 82-7, pp. 339-346, (proceedings of the Fall Meeting of the Electrochemical Society held Oct. 17-21, 1982, in Detroit, Mich.).
R. D. Rung et al, "Deep Trench Isolated CMOS Devices," IEDM Technical Digest, Dec. 1982, pp. 237-240.

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