Latch-free sequence generation for high concurrency systems

Details Latch-free sequence generation for high concurrency systems Latch-free sequence generation for high concurrency systems

1997-10-31

1999-11-09

Eng, David Y.

G06F 946

Patent

active

059830158

ABSTRACT:
A method and apparatus for reading a software counter in a computer system that contains a plurality of processes each having access to the software counter is provided. The software counter includes a wrap portion and a base portion that cannot both be accessed in an atomic operation. The method includes the steps of reading a first value. The first value being one of the wrap or base portions. Reading a second value. The second value being the other of the wrap or base portion. Determining whether the first value might be changed during a time period that elapsed between reading the first value and reading the second value. If the first value might be changed during the time period, then obtaining a latch that covers at least the wrap portion. After obtaining the latch, reading the wrap and base portion and releasing the latch.

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patent: 5625829 (1997-04-01), Gephardt et al.
patent: 5784623 (1998-07-01), Srinvasan

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