Latch free IGBT with schottky gate

Active solid-state devices (e.g. – transistors – solid-state diode – Schottky barrier – In integrated structure

Reexamination Certificate

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Details

C257S330000, C257S474000, C257S479000, C257S565000, C257S587000

Reexamination Certificate

active

06417554

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor devices and more specifically relates to a novel insulated gate bipolar transistor (IGBT) which cannot latch on.
BACKGROUND OF THE INVENTION
IGBTs are well known devices and generally consist of a four layer device with a MOSgate. Thus, the devices generally employ a P type emitter layer which has an N
+
buffer layer thereon and an N

body regions atop the buffer. P type base diffusions are then formed in the N

body regions and N type emitter diffusions are formed in the P type base regions. The N type emitter regions are spaced from the boundaries of the P bases to define invertible channel regions. A MOSgate structure is then formed atop these channel regions.
Thus, the device is basically a four layer structure with the upper three layers and lower three layers defining respective bipolar transistors. As is well known, if the sum of the gains of these transistors exceeds unity, the device will latch on, that is, will remain conductive even after the gate turn on signal is removed.
It would be desirable to make an IGBT which cannot latch on. It would be further desirable to simplify the manufacture of such IGBTs by reducing the number of junctions which must be formed, and by reducing the thickness need for the N

body.
BRIEF SUMMARY OF THE INVENTION
In accordance with the invention, the emitter region (sometimes called a source region) of a conventional IGBT is replaced by a trench gate and a Schottky injecting contact on the N

body to initiate device conduction. As a result of the novel structure, the fourth layer (the N
+
emitter layer) of a conventional IGBT is removed and the device no longer has cascaded bipolar transistors and cannot latch on. Furthermore, the N

body region, which is usually epitaxially deposited, can be much thinner for a given voltage rating so that a less expensive starting wafer and fewer diffusion steps are needed for the manufacture of the device.


REFERENCES:
patent: 5111253 (1992-05-01), Korman et al.
patent: 5478764 (1995-12-01), Inoue
patent: 5583348 (1996-12-01), Sundaram
patent: 5773851 (1998-06-01), Nakamura et al.
patent: 5783491 (1998-07-01), Nakamura
patent: 5912497 (1999-06-01), Baliga
patent: 6198127 (2001-03-01), Kocon
patent: 6236099 (2001-05-01), Boden, Jr.
patent: 6255692 (2001-07-01), Huang
patent: 6265744 (2001-07-01), Okumura

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