Latch-down-resistant protection circuits and voltage regulator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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Details

327540, G05F 110, G05F 302

Patent

active

057149054

ABSTRACT:
A method, and associated circuit, which can prevent the latch-down phenomenon in transistors which are protected from going out of their SOAs.
By supplementing the first protection circuit (against moving out of the SOA) with a second protection circuit which can drive the control terminal of the transistor such that when, upon the voltage across the main conduction path of the transistor being increased, the value of the current flowing through said path would tend, due to the first protection, to drop below a predetermined lower limit, that value can be kept approximately constant and unaffected by the load as seen from the output terminal of the transistor; the transistor will at all events supply the load with some current up to the acceptable limit VMAX by the transistor.

REFERENCES:
patent: 3536958 (1970-10-01), Sondermeyer
patent: 4021701 (1977-05-01), Davies
patent: 4355341 (1982-10-01), Kaplan
patent: 4495537 (1985-01-01), Laude
patent: 5047988 (1991-09-01), Mizuta
patent: 5130883 (1992-07-01), Edwards
patent: 5357089 (1994-10-01), Prentice
patent: 5382839 (1995-01-01), Shinohara
patent: 5550462 (1996-08-01), Nakajima

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